M66210P, M66211, M66221FP Selling Leads, Datasheet
MFG:DIP Package Cooled:MIT D/C:1992
M66210P, M66211, M66221FP Datasheet download
Part Number: M66210P
MFG: DIP
Package Cooled: MIT
D/C: 1992
M66210P, M66211, M66221FP
- Table of contents:
Info of M66210P
Info of M66211
Info of M66221FP
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About M660
PDF/DataSheet Download
Datasheet: M660
File Size: 60756 KB
Manufacturer: ICST [Integrated Circuit Systems]
Download : Click here to Download
About M660
PDF/DataSheet Download
Datasheet: M660
File Size: 60756 KB
Manufacturer: ICST [Integrated Circuit Systems]
Download : Click here to Download
About M66221FP
PDF/DataSheet Download
Datasheet: M66221FP
File Size: 122137 KB
Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]
Download : Click here to Download
M66221FP General Description
The M66221 is a mail box that incorporates a complete CMOS shared memory cell of 256 ´ 9-bit configuration using high-performance silicon gate CMOS process technology, and is equipped with two access
ports of A and B.
Access ports A and B are equipped with independent addresses CS,WE and OE control pins and I/O pins to allow independent and asynchronous read/write operations from/to shared memory individually. This product also incorporates a port adjustment arbitration function in address contention from both ports.
M66221FP Maximum Ratings
|
Symbol |
Parameter |
Conditions |
Ratings |
Unit |
| Vcc | Supply voltage |
When defining GND pin as a reference. |
-0.3to +7.0 |
V |
| VI | Input voltage |
-0.3toVcc+0.3 |
V | |
| Vo | Output voltage |
0toVcc |
V | |
| Pd | Maximum power dissipation | Ta = 25 °C |
800 |
mW |
| Tstg | Storage temperature |
-65 to +150 |
°C |
M66221FP Features
• Memory configuration of 256×9 bits
• High-speed access, address access time 40ns (typ.)
• Complete asynchronous accessibility from ports A and B
• Completely static operation
• Built-in port arbitration function
• Low power dissipation CMOS design
• 5V single power supply
• Not Readyoutput pin is provided (open drain output)
• TTL direct-coupled I/O
• 3-state output for I/O pins.
• High-speed access, address access time 40ns (typ.)
• Complete asynchronous accessibility from ports A and B
• Completely static operation
• Built-in port arbitration function
• Low power dissipation CMOS design
• 5V single power supply
• Not Readyoutput pin is provided (open drain output)
• TTL direct-coupled I/O
• 3-state output for I/O pins.
M66221FP Typical Application
Inter-MPU data transfer memory, buffer memory for image processing system.
M66221FP Connection Diagram
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