LPR340, LPR520, LPR521 Selling Leads, Datasheet
MFG:Module Package Cooled:BB D/C:93+
LPR340, LPR520, LPR521 Datasheet download
Part Number: LPR340
MFG: Module
Package Cooled: BB
D/C: 93+
LPR340, LPR520, LPR521
- Table of contents:
Info of LPR340
Info of LPR520
Info of LPR521
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About LPR30
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Datasheet: LPR30
File Size: 96909 KB
Manufacturer: STMICROELECTRONICS [STMicroelectronics]
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About LPR520
PDF/DataSheet Download
Datasheet: LPR520
File Size: 166360 KB
Manufacturer: LODEV [LOGIC Devices Incorporated]
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About LPR30
PDF/DataSheet Download
Datasheet: LPR30
File Size: 96909 KB
Manufacturer: STMICROELECTRONICS [STMicroelectronics]
Download : Click here to Download
LPR520 General Description
·The LPR520 is functionally compatible with the L29C520 but have 16-bit inputs and outputs. The LPR520 is implemented in low power CMOS.
·The LPR520 contains four registers which can be configured as two independent, 2-level pipelines or as one 4-level pipeline.
·The Instruction pins, I1-0, control the loading of the registers. The registers may be configured as a four-stage delay line, with data loaded into R1 and shifted sequentially through R2, R3, and R4. Also, data may be loaded from the inputs into either R1 or R3 with only R2 or R4 shifting. Finally, I1-0 may be set to prevent any register from changing.
·The S1-0 select lines control a 4-to-1 multiplexer which routes the contents of any of the registers to the Y output pins. The independence of the I and S controls allows simultaneous write and read operations on different registers.
·The LPR520 contains four registers which can be configured as two independent, 2-level pipelines or as one 4-level pipeline.
·The Instruction pins, I1-0, control the loading of the registers. The registers may be configured as a four-stage delay line, with data loaded into R1 and shifted sequentially through R2, R3, and R4. Also, data may be loaded from the inputs into either R1 or R3 with only R2 or R4 shifting. Finally, I1-0 may be set to prevent any register from changing.
·The S1-0 select lines control a 4-to-1 multiplexer which routes the contents of any of the registers to the Y output pins. The independence of the I and S controls allows simultaneous write and read operations on different registers.
LPR520 Maximum Ratings
Storage temperature ........................................................................................................... 65 to +150
Operating ambient temperature ........................................................................................... 55 to +125
VCC supply voltage with respect to ground .......................................................................... 0.5 V to +7.0 V
Input signal with respect to ground .......................................................................................3.0 V to +7.0 V
Signal applied to high impedance output .............................................................................. 3.0 V to +7.0 V
Output current into low outputs ............................................................................................................ 25 mA
Latchup current ........................................................................................................................... .... > 400 mA
Operating ambient temperature ........................................................................................... 55 to +125
VCC supply voltage with respect to ground .......................................................................... 0.5 V to +7.0 V
Input signal with respect to ground .......................................................................................3.0 V to +7.0 V
Signal applied to high impedance output .............................................................................. 3.0 V to +7.0 V
Output current into low outputs ............................................................................................................ 25 mA
Latchup current ........................................................................................................................... .... > 400 mA
LPR520 Features
· Four 16-bit Registers
· Implements Double 2-Stage Pipeline or Single 4-Stage Pipeline Register
· Hold, Shift, and Load Instructions
· Separate Data In and Data Out Pins
· High-Speed, Low Power CMOS Technology
· Three-State Outputs
· 44-pin PLCC, J-Lead
· Implements Double 2-Stage Pipeline or Single 4-Stage Pipeline Register
· Hold, Shift, and Load Instructions
· Separate Data In and Data Out Pins
· High-Speed, Low Power CMOS Technology
· Three-State Outputs
· 44-pin PLCC, J-Lead
LPR520 Connection Diagram
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