KT3170, KT333, KT333 CE Selling Leads, Datasheet
MFG:N/A Package Cooled:DIP18 D/C:00+
KT3170, KT333, KT333 CE Datasheet download
Part Number: KT3170
MFG: N/A
Package Cooled: DIP18
D/C: 00+
MFG:N/A Package Cooled:DIP18 D/C:00+
KT3170, KT333, KT333 CE Datasheet download
MFG: N/A
Package Cooled: DIP18
D/C: 00+
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Datasheet: KT3170
File Size: 120066 KB
Manufacturer: SAMSUNG [Samsung semiconductor]
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PDF/DataSheet Download
Datasheet: KT3102AM
File Size: 252162 KB
Manufacturer: INTEGRAL [Integral Corp.]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: KT3102AM
File Size: 252162 KB
Manufacturer: INTEGRAL [Integral Corp.]
Download : Click here to Download
Pin No | Symbol | Description |
1 | IN + | Non inverting input of the op amp. |
2 | IN - | Inverting input of the op amp. |
3 | GS | Gain Select. The output used for gain adjustment of analog input signal with a feedback resistor. |
4 | VREF | Reference Voltage output (VDD /2, Typ) can be used to bias the op amp input of VDD /2. |
5 | IIN | Input inhibit. High input states inhibits the detection of tones.This pin is pulled down internally. |
6 | PDN | Control input for the stand-by power down mode. Power down occurs when the signal on this input is in high states. This pin is pulled down internally. |
7.8 | OSC1 OSC2 |
Clock input/output. A inexpensive 3.579545MHz crystal connected between these pins completes internal oscillator. Also, external clock can be used. |
9 | GND | Ground pin. |
10 | OE | Output Enable input. Outputs Q1-Q4 are CMOS push pull when OE is High and open circuited (High impedance) when disabled by pulling OE low. Internal pull up resistor built in. |
11-14 | Q1 - Q4 | Three state data output. When enabled by OE, these digital outputs provide the hexadecimal code corresponding to the last valid tone pair received. |
15 | DSO | Delayed Steering Output. Indicates that valid frequencies have been present for the required guard time, thus constituting a valid signal. Presents a logic high when a received tone pair has been registered and the output latch is updated. Returns to logic low when the voltage on SI/GTO falls below V .TH |
16 | ESO | Early Steering Outputs. Indicates detection of valid tone output a logic high immediately when the digital algorithm detects a recognizable tone pair. Any momentary loss of signal condition will cause ESO to return to low. |
17 | SI/GTO | Steering Input/Guard Time Output. A voltage greater the VTS detected at SI causes the device to register the detected tone pair and update the output latch. A voltage less than V frees the deviceTS to accept a new tone pair. The GTO output acts to reset the external steering time constant, and its state is a function of ESO and the voltage on SI |
18 | VDD | Power Supply (+5V, Typ) |
Characteristics | Symbol | Value | Unit |
Power Supper Voltage Analog Input Voltage Range Digital Input Voltage Range Output Voltage Range Current On Any Pin Operating Temperature Storage Temperature |
VDD VI(A) VI(D) VO I I TOPR TSTG |
6 - 0.3 ~ VDD + 0.3 - 0.3 ~ VDD + 0.3 - 0.3 ~ VDD + 0.3 10 - 40 ~ + 85 -60 ~ + 150 |
V V V V mA |