KC73129-UBA, KC73133C, KC73219-M Selling Leads, Datasheet
MFG:SEC Package Cooled:CDIP D/C:05+
KC73129-UBA, KC73133C, KC73219-M Datasheet download
Part Number: KC73129-UBA
MFG: SEC
Package Cooled: CDIP
D/C: 05+
MFG:SEC Package Cooled:CDIP D/C:05+
KC73129-UBA, KC73133C, KC73219-M Datasheet download
MFG: SEC
Package Cooled: CDIP
D/C: 05+
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PDF/DataSheet Download
Datasheet: KC73125MP
File Size: 212299 KB
Manufacturer: SAMSUNG [Samsung semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: KC73133C
File Size: 251034 KB
Manufacturer: SAMSUNG [Samsung semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: KC73125MP
File Size: 212299 KB
Manufacturer: SAMSUNG [Samsung semiconductor]
Download : Click here to Download
The KC73133C is an interline transfer progressive scan type square pixel CCD area image sensor of 1/3 inch optical format developed for VGA. The electron accumulation time can be changed by the electronic shutter function and it is possible to obtain a frame still image without a mechanical shutter. High resolution and good color reproduction are accomplished by using mosaic R, G, B primary color filters. It is suitable for still cameras and PC input cameras.
Characteristics |
Symbols |
Min. |
Max. |
Unit |
Substrate voltage | SUB - GND |
-0.3 |
40 |
V |
SUB - VDD |
-0.3 |
40 |
V | |
SUB - VOUT |
-0.3 |
40 |
V | |
Supply voltage | VDD, VOUT,- GND |
-0.3 |
17 |
V |
Vertical clock input voltage | V1 - VL |
-0.3 |
17 |
V |
V2, V3 - VL |
-0.3 |
32 |
V | |
V1 - SUB |
-40 |
17 |
V | |
V2, V3 - SUB |
-40 |
17 |
V | |
Horizontal clock input voltage | H1, H2 - GND |
-0.3 |
substrate DC bias (3) |
V |
H1, H2 - VL |
-0.3 |
17 |
V | |
RS - SUB |
-40 |
substrate DC bias (2) |
V | |
RS - GND |
-0.3 |
17 (2) |
V | |
Protection circuit bias voltage | SUB - VL |
-16 |
40 |
V |
GND - VL |
-0.3 |
17 |
V | |
Operating temperature | TOP |
-10 |
60 |
°C |
Storage temperature | TSTG |
-30 |
80 |
°C |
NOTE:
1. The device can be destroyed, if the applied voltage or temperature is higher than the absolute maximum rating voltage or temperature.
2. VDD bias must be operated before reset pulse operation.
3. Substrate DC bias(OFD bias) must be operated before horizontal, reset pulse operation.