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The ICS542 is a cost effective way to produce a high quality clock output divided from a clock input. The chip accepts a clock input up to 156 MHz, and produces a divide by 2, 4, 6, 8, 12, or 16 of the input clock. There are two outputs on the chip, one being a low-skew divide by two of the other. So, for instance, if a 100 MHz clock is used, the ICS542 can produce low skew 50 MHz and 25 MHz clocks, or low skew 25 MHz and 12.5 MHz clocks. The chip has an all-chip power down mode that stops the outputs low, and an OE pin that tri-states the outputs.
The ICS542 is a member of the ICS ClockBlocks™ family of clock building blocks. See the ICS541 and ICS543 for other clock dividers, and the ICS501, 502, 511, 512 and 525 for clock multipliers.
ICS542 Features
• Packaged as 8 pin SOIC • ICS' lowest cost clock divider • Low skew (500ps) outputs. One is ÷ 2 of other. • Easy to use with other generators and buffers • Input clock frequency up to 156 MHz • Output clock duty cycle of 45/55 • Power Down turns off chip • Output Enable • Advanced, low power CMOS process • Operating voltages of 3.0 to 5.5 V
ICS542 Connection Diagram
ICS542M Parameters
Technical/Catalog Information
ICS542M
Vendor
IDT, Integrated Device Technology Inc
Category
Integrated Circuits (ICs)
Type
Clock Divider
Voltage - Supply
3 V ~ 5.5 V
Number of Outputs
2
Input
CMOS
Output
CMOS
Frequency-Max
156MHz
Package / Case
8-SOIC
Packaging
Tube
Operating Temperature
0°C ~ 70°C
Drawing Number
*
Lead Free Status
Contains Lead
RoHS Status
RoHS Non-Compliant
Other Names
ICS542M ICS542M
ICS542M General Description
The ICS542 is a cost effective way to produce a high quality clock output divided from a clock input. The chip accepts a clock input up to 156 MHz, and produces a divide by 2, 4, 6, 8, 12, or 16 of the input clock. There are two outputs on the chip, one being a low-skew divide by two of the other. So, for instance, if a 100 MHz clock is used, the ICS542 can produce low skew 50 MHz and 25 MHz clocks, or low skew 25 MHz and 12.5 MHz clocks. The chip has an all-chip power down mode that stops the outputs low, and an OE pin that tri-states the outputs.
The ICS542 is a member of the ICS ClockBlocks™ family of clock building blocks. See the ICS541 and ICS543 for other clock dividers, and the ICS501, 502, 511, 512 and 525 for clock multipliers.
ICS542M Maximum Ratings
Parameter
Conditions
Minimum
Maximum
Units
Supply voltage, VDD
Referenced to GND
7
V
Inputs
Referenced to GND
-0.5
VDD+0.5
V
Clock Output
Referenced to GND
-0.5
VDD+0.5
V
Ambient Operating Temperature
0
70
Soldering Temperature
Max of 10 seconds
260
Storage temperature
-65
150
ICS542M Features
• Packaged as 8 pin SOIC • ICS' lowest cost clock divider • Low skew (500ps) outputs. One is ÷ 2 of other. • Easy to use with other generators and buffers • Input clock frequency up to 156 MHz • Output clock duty cycle of 45/55 • Power Down turns off chip • Output Enable • Advanced, low power CMOS process • Operating voltages of 3.0 to 5.5 V