HV500PJ, HV501PJ, HV507 Selling Leads, Datasheet
MFG:SILXONIX Package Cooled:PLCC-44 D/C:08+/09+
HV500PJ, HV501PJ, HV507 Datasheet download

Part Number: HV500PJ
MFG: SILXONIX
Package Cooled: PLCC-44
D/C: 08+/09+
MFG:SILXONIX Package Cooled:PLCC-44 D/C:08+/09+
HV500PJ, HV501PJ, HV507 Datasheet download

MFG: SILXONIX
Package Cooled: PLCC-44
D/C: 08+/09+
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PDF/DataSheet Download
Datasheet: HV506
File Size: 475220 KB
Manufacturer: SUTEX [Supertex, Inc]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: HV506
File Size: 475220 KB
Manufacturer: SUTEX [Supertex, Inc]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: HV507
File Size: 464766 KB
Manufacturer: SUTEX [Supertex, Inc]
Download : Click here to Download
The HV507 is a low voltage serial to high voltage parallel converter with 64 high voltage push-pull outputs. This device has been designed for use as a printer driver for electrostatic applications. It can also be used in any application requiring multiple high voltage outputs, low current sourcing and sinking capabilities.
The device consists of a 64-bit shift register, 64 latches, and control logic to perform the polarity select and blanking of the outputs. A DIR pin controls the direction of data shift through the device. With DIR grounded, DIOA is Data In and DIOB is Data Out; data is shifted from HVOUT64 to HVOUT1. When DIR is at logic high, DIOB is Data In and DIOA is Data Out: data is then shifted from HVOUT1 to HVOUT64. Data is shifted through the shift register on the low to high transition of the clock. Data output buffers are provided for cascading devices. Operation of the shift register is not affected by the LE, BL, or the POL inputs. Transfer of data from the shift register to the latch occurs when the LE is high. The data in the latch is stored during LE transition from high to low.

