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SuperSOTTM -3 N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package.
FDN357N Maximum Ratings
Symbol
Parameter
FDN338P
Units
VDSS
Drain-Source Voltage
30
V
VGSS
Gate-Source Voltage
±20
V
ID
Drain Current - Continuous - Pulsed
1.9
A
10
PD
Maximum Power Dissipation(Note 1a) (Note 1b)
0.5
W
0.46
TJ, Tstg
Operating and Storage Junction Temperature Range
-55 to +150
FDN357N Features
1.9 A, 30 V, R DS(ON)= 0.090 @ VGS = 4.5 V R DS(ON) = 0.060 @ VGS = 10 V. Industry standard outline SOT-23 surface mount package using proprietary SuperSOTTM -3 design for superior thermal and electrical capabilities. High density cell design for extremely low R DS(ON) Exceptional on-resistance and maximum DC current capability.