DS3897, DS3897M, DS3897MX Selling Leads, Datasheet
MFG:NS Package Cooled:SOP20W D/C:09+
DS3897, DS3897M, DS3897MX Datasheet download
Part Number: DS3897
MFG: NS
Package Cooled: SOP20W
D/C: 09+
MFG:NS Package Cooled:SOP20W D/C:09+
DS3897, DS3897M, DS3897MX Datasheet download
MFG: NS
Package Cooled: SOP20W
D/C: 09+
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PDF/DataSheet Download
Datasheet: DS3897
File Size: 253858 KB
Manufacturer: NSC [National Semiconductor]
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PDF/DataSheet Download
Datasheet: DS3897M
File Size: 253858 KB
Manufacturer: NSC [National Semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: DS3
File Size: 68288 KB
Manufacturer: Linear
Download : Click here to Download
These advanced transceivers are specifically designed toovercome problems associated with driving a densely popu-lated backplane, and thus provide significant improvement inboth speed and data integrity. Their low output capacitance,low output signal swing and noise immunity features makethem ideal for driving low impedance buses with minimumpower consumption.The DS3896 is an octal high speed schottky bus transceiverwith common control signals, whereas the DS3897 is a quaddevice with independent driver input and receiver outputpins. The DS3897 has a separate driver disable for eachdriver and is, therefore, suitable for arbitration lines. Theseparate driver disable pins (En) feature internal pull upsand may be left open if not required. On the other hand, theDS3896 provides high package density for data/addresslines.
The open collector drivers generate precise trapezoidalwaveforms, which are relatively independent of capacitiveloading conditions on the outputs. This significantly reducesnoise coupling to adjacent lines. In addition, the receiversuse a low pass filter in conjunction with a high speed com-parator, to further enhance the noise immunity and provideequal rejection to both negative and positive going noisepulses on the bus.To minimize bus loading, these devices also feature a schot-tky diode in series with the open collector output that isolates
the driver output capacitance in the disabled state. The out-put low voltage is typically "1V" and the output high level isintended to be 2V. This is achieved by terminating the buswith a pull up resistor to 2V at both ends. The device candrive an equivalent DC load of 18.5Ω (or greater) in the above configuration.These signalling requirements, including a 1 volt signalswing, low output capacitance and precise receiver thresh-olds are referred to as Bus Transceiver Logic (BTL).