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CY-4G320P026-1, CY5001, CY5057

CY-4G320P026-1, CY5001, CY5057 Selling Leads, Datasheet

MFG:N/A  Package Cooled:DIP24  D/C:N/A

CY-4G320P026-1, CY5001, CY5057 Picture

CY-4G320P026-1, CY5001, CY5057 Datasheet download

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Part Number: CY-4G320P026-1

 

MFG: N/A

Package Cooled: DIP24

D/C: N/A

 

 

 
 
 
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  • CY505YC56DVT

  • Vendor: Cypress Pack: BGA D/C: 08+& Qty: 8272 Note: New original stock  Adddate: 2024-11-25
  • Inquire Now
  • SHENZHEN SHI KEN ELECTRONICS   China
    Contact: Mr.lin   MSN:skyline.dk@msn.com
    Tel: 86-755-83030307
    Fax: 86-755-83030408
    (6)

About CY500

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Datasheet: CY500

File Size: 1134785 KB

Manufacturer: ETC [ETC]

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  • CY505YC56DVT

  • Vendor: Cypress Pack: BGA D/C: 08+& Qty: 8272 Note: New original stock  Adddate: 2024-11-25
  • Inquire Now
  • SHENZHEN SHI KEN ELECTRONICS   China
    Contact: Mr.lin   MSN:skyline.dk@msn.com
    Tel: 86-755-83030307
    Fax: 86-755-83030408
    (6)

About CY5057

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Datasheet: CY5057

File Size: 407916 KB

Manufacturer: CYPRESS

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CY5057 General Description

The CY5057 is a flash-programmable, high-accuracy, PLL-based die designed for the crystal oscillator market. It also contains spread spectrum circuitry that can be enabled or disabled with an external pin. The die is integrated with a low-cost 25.1-MHz fundamental tuned crystal in a four- or six-pin through-hole or surface mount package. The oscillator devices can be stocked as blank parts and custom frequencies can be programmed in-package at the last stage before shipping. This enables fast-turn manufacturing of custom and standard crystal oscillators without the need for dedicated, expensive crystals.

The CY5057 contains an on-chip oscillator and unique oscillator tuning circuit for fine-tuning the output frequency. The crystal Cload can be selectively adjusted by programming a set of flash memory bits. This feature can be used to compensate for crystal variations or to obtain a more accurate synthesized frequency.

The CY5057 uses a simple two-pin programming interface excluding the VSS and VDD pins. Clock outputs can be generated from 5 MHz to 170 MHz at 3.3V ± 10% operating voltage. The entire Flash configuration can be reprogrammed multiple times, allowing programmed inventory to be altered or reused.

The CY5057 PLL die has been designed for very high resolution. It has a 10-bit feedback counter multiplier and a seven-bit reference counter divider. This enables the synthesis of highly accurate and stable output clock frequencies with zero or low PPM error. The output of the PLL or the oscillator can be further modified by a seven-bit linear post divider with a total of 126 divider options (2 to 127).

The CY5057 also contains flexible power management controls. These parts include both power-down mode (PD# = 0) and output enable mode (OE = 1). The power-down and output enable modes have an additional setting to determine timing (asynchronous or synchronous) with respect to the output signal.

Controlled rise and fall times, unique output driver circuits, and innovative circuit layout techniques enable the CY5057 to have low jitter and accurate outputs making it suitable for most PC, networking and consumer applications.

The CY5057 also has an additional spread spectrum feature that can be disabled or enabled with an external pin. Please refer to Spread Spectrum section for details.

CY5057 Maximum Ratings

(Above which the useful life may be impaired. For user guidelines, not tested.)
Supply Voltage ..................................................0.5 to +7.0V
Input Voltage ............................................ 0.5V to VDD + 0.5
Storage Temperature (Non-condensing).....55°C to +125°C
Junction Temperature................................ 40°C to +125°C
Data Retention @ Tj = 125°C................................> 10 years
Maximum Programming Cycles........................................100
Static Discharge Voltage.......................................... > 2000V
(per MIL-STD-883, Method 3015)

CY5057 Features

• Flash-programmable die for in-package programming of crystal oscillators
• High-resolution phase-locked loop (PLL) with 10-bit multiplier and seven-bit divider
• Flash-programmable capacitor tuning array
• Simple two-pin programming interface (excluding VDD and VSS pins)
• On-chip oscillator used with external 25.1-MHz fundamental tuned crystal
• Flash-programmable spread spectrum with spread percentages between +0.25% and +2.00%
• Spread Spectrum On/Off function
• Operating frequency 5170 MHz at 3.3V ± 10%
• Seven-bit linear post divider with divide options from divide-by-2 to divide-by-127
• Programmable PD# or OE pin
• Programmable asynchronous or synchronous OE and PD# modes
• Low jitter output < 200 ps (pk-pk) at 3.3V ± 10%
• Controlled rise and fall times and output slew rate
• Software Configuration Support

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