CDP1852DE, CDP185303, CDP1853C Selling Leads, Datasheet
MFG:HAR Package Cooled:CDIP16
CDP1852DE, CDP185303, CDP1853C Datasheet download
Part Number: CDP1852DE
MFG: HAR
Package Cooled: CDIP16
D/C:
MFG:HAR Package Cooled:CDIP16
CDP1852DE, CDP185303, CDP1853C Datasheet download
MFG: HAR
Package Cooled: CDIP16
D/C:
Want to post a buying lead? If you are not a member yet, please select the specific/related part number first and then fill the quantity and your contact details in the "Request for Quotation Form" on the left, and then click "Send RFQ".Your buying lead can then be posted, and the reliable suppliers will quote via our online message system or other channels soon.
TOP
PDF/DataSheet Download
Datasheet: CDP1020
File Size: 158108 KB
Manufacturer: INTERSIL [Intersil Corporation]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: CDP1020
File Size: 158108 KB
Manufacturer: INTERSIL [Intersil Corporation]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: CDP1853C
File Size: 36311 KB
Manufacturer: INTERSIL [Intersil Corporation]
Download : Click here to Download
The CDP1853 and CDP1853C are 1 of 8 decoders designed for use in general purpose microprocessor systems. These devices, which are functionally identical, are specifically designed for use as gated N-bit decoders and interface directly with the 1800-series microprocessors without additional components. The CDP1853 has a recommended operating voltage range of 4V to 10.5V, and the CDP1853C has a recommended operating voltage range of 4V to 6.5V.
When CHIP ENABLE (CE) is high, the selected output will be true (high) from the trailing edge of CLOCK A (high-to-low transition) to the trailing edge of CLOCK B (high-to-low transition). All outputs will be low when the device is not selected (CE = 0) and during conditions of CLOCK A and CLOCK B as shown in Figure 2. The CDP1853 inputs N0, N1, N2, CLOCK A, and CLOCK B are connected to an 1800-series microprocessor outputs N0, N1, N2, TPA, and TPB respectively, when used to decode I/O commands as shown in Figure 5. The CHIP ENABLE (CE) input provides the capability for multiple levels of decoding as shown in Figure 6.
The CDP1853 can also be used as a general 1 of 8 decoder for I/O and memory system applications as shown in Figure 4.
The CDP1853 and CDP1853C are supplied in hermetic 16-lead dual-in-line ceramic (D suffix) and plastic (E suffix) packages.