CDP1821C

Features: • Static CMOS Silicon-On-Sapphire Circuitry CD4000- Series Compatible• Compatible with CDP1800-Series Microprocessors at Maximum Speed• Fast Access Time. . . . . . . . . . . 100ns Typ. at VDD = 5V• Single Voltage Supply• No Precharge or External Clocks Requi...

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CDP1821C Picture
SeekIC No. : 004312431 Detail

CDP1821C: Features: • Static CMOS Silicon-On-Sapphire Circuitry CD4000- Series Compatible• Compatible with CDP1800-Series Microprocessors at Maximum Speed• Fast Access Time. . . . . . . . . ...

floor Price/Ceiling Price

Part Number:
CDP1821C
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

• Static CMOS Silicon-On-Sapphire Circuitry CD4000- Series Compatible
• Compatible with CDP1800-Series Microprocessors at Maximum Speed
• Fast Access Time. . . . . . . . . . . 100ns Typ. at VDD = 5V
• Single Voltage Supply
• No Precharge or External Clocks Required
• Low Quiescent and Operating Power
• Separate Data Inputs and Outputs
• High Noise Immunity . . . . . . . . . . . . . . . . . . 30% of VDD
• Memory Retention for Standby Battery Voltage Down to 2V at +25oC
• Latch-Up-Free Transient-Radiation Tolerance



Pinout

  Connection Diagram


Specifications

DC Supply Voltage Range, (VDD)
   (All Voltages Referenced to VSS Terminal) . . . .  . . . -0.5V to +7V
Input Voltage Range, All Inputs . . . . . . . . . .  . -0.5V to VDD +0.5V
DC Input Current, Any One Input. . . . . . . . . . . .. . . . . . . . .±10mA



Description

The CDP1821C/3 is a 1024-word x 1-bit CMOS silicon-on-sapphire (SOS), fully static, random-access memory designed for use in CDP1800 microprocessor systems. This device has a recommended operating voltage range of 4V to 6.5V.

The output state of the CDP1821C/3 is a function of the input address and chip-select states only. Valid data will appear at the output in one access time following the latest address change to a selected chip. After valid data appears, the address may be changed immediately. CDP1821C is not necessary to clock the chip-select input or any other input terminal for fully static operation; therefore the chip-select input may be used as an additional address input. When the device is in an unselected state (CS = 1), the internal write circuitry and output sense amplifier are disabled. This feature allows the three-state data outputs from many arrays to be OR-tied to a common bus for easy memory expansion.




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