CDC305-1N, CDC318, CDC318A Selling Leads, Datasheet
MFG:TI Package Cooled:DIP D/C:96
CDC305-1N, CDC318, CDC318A Datasheet download
Part Number: CDC305-1N
MFG: TI
Package Cooled: DIP
D/C: 96
CDC305-1N, CDC318, CDC318A
- Table of contents:
Info of CDC305-1N
Info of CDC318
Info of CDC318A
Attentive hint
Want to post a buying lead? If you are not a member yet, please select the specific/related part number first and then fill the quantity and your contact details in the "Request for Quotation Form" on the left, and then click "Send RFQ".Your buying lead can then be posted, and the reliable suppliers will quote via our online message system or other channels soon.
Top Sellers:
TOP
About CDC305-1N
PDF/DataSheet Download
Datasheet: CDC305-1N
File Size: 117242 KB
Manufacturer: TI [Texas Instruments]
Download : Click here to Download
About CDC318
PDF/DataSheet Download
Datasheet: CDC318
File Size: 188838 KB
Manufacturer:
Download : Click here to Download
About CDC318A
PDF/DataSheet Download
Datasheet: CDC318A
File Size: 187281 KB
Manufacturer: TI [Texas Instruments]
Download : Click here to Download
CDC305-1N Parameters
- High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications
- Output Skew, tsk(o), Less Than 250 ps
- Pulse Skew, tsk(p), Less Than 500 ps
- Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs)
- I2C Serial Interface Provides Individual Enable Control for Each Output
- Operates at 3.3 V
- Distributed VCC and Ground Pins Reduce Switching Noise
- 100-MHz Operation
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015
- Packaged in 48-Pin Shrink Small Outline (DL) Package
CDC305-1N General Description
1-Line To 18-Line Clock Driver With I2C Control Interface
CDC305-1N Features
- High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications
- Output Skew, tsk(o), Less Than 250 ps
- Pulse Skew, tsk(p), Less Than 500 ps
- Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs)
- I2C Serial Interface Provides Individual Enable Control for Each Output
- Operates at 3.3 V
- Distributed VCC and Ground Pins Reduce Switching Noise
- 100-MHz Operation
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015
- Packaged in 48-Pin Shrink Small Outline (DL) Package
CDC305-1N Typical Application
CDC318A Datasheet
CDC318 General Description
The CDC318 is a high-performance clock buffer that distributes one input (A) to 18 outputs (Y) with minimum skew for clock distribution. The CDC318
operates from a 3.3-V power supply, and is characterized for operation from 0°C to 70°C.
The device provides a standard mode (100K-bits/s) I2C serial interface for device control. The implementation is as a slave/receiver. The device address is specified in the I2C device address table. Both of the I2C inputs (SDATA and SCLOCK) provide integrated pullup resistors (typically 140 k) and are 5-V tolerant.
Three 8-bit I2C registers provide individual enable control for each of the outputs. All outputs default to enabled at powerup. Each output can be placed in a disabled mode with a low-level output when a low-level control bit is written to the control register. The registers are write only and must be accessed in sequential order (i.e., random access of the registers is not supported).
The CDC318 provides 3-state outputs for testing and debugging purposes. The outputs can be placed in a high-impedance state via the output-enable (OE) input. When OE is high, all outputs are in the operational state. When OE is low, the outputs are placed in a high-impedance state. OE provides an integrated pullup resistor.
CDC318 Maximum Ratings
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 4.6 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 4.6 V
Input voltage range, VI (SCLOCK, SDATA) (see Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 6.5 V
Output voltage range, VO (SDATA) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . 0.5 V to 6.5 V
Voltage range applied to any output in the high or power-off state, VO . . . . . . .. . .0.5 V to VCC +0.5 V
Current into any output in the low state (except SDATA), IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 mA
Current into SDATA in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 mA
Input clamp current, IIK (VI < 0) (SCLOCK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Output clamp current, IOK (VO < 0) (SDATA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Package thermal impedance, JA (see Notes 2 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .84°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . .260°C
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 4.6 V
Input voltage range, VI (SCLOCK, SDATA) (see Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 6.5 V
Output voltage range, VO (SDATA) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . 0.5 V to 6.5 V
Voltage range applied to any output in the high or power-off state, VO . . . . . . .. . .0.5 V to VCC +0.5 V
Current into any output in the low state (except SDATA), IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 mA
Current into SDATA in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 mA
Input clamp current, IIK (VI < 0) (SCLOCK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Output clamp current, IOK (VO < 0) (SDATA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Package thermal impedance, JA (see Notes 2 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .84°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . .260°C
CDC318 Features
High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications
Output Skew, tsk(o), Less Than 250 ps
Pulse Skew, tsk(p), Less Than 650 ps
Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs)
I2C Serial Interface Provides Individual Enable Control for Each Output
Operates at 3.3 V
Distributed VCC and Ground Pins Reduce Switching Noise
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015
Packaged in 48-Pin Shrink Small Outline (DL) Package
CDC318 Connection Diagram
CDC318A Parameters
- High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications
- Output Skew, tsk(o), Less Than 250 ps
- Pulse Skew, tsk(p), Less Than 500 ps
- Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs)
- I2C Serial Interface Provides Individual Enable Control for Each Output
- Operates at 3.3 V
- Distributed VCC and Ground Pins Reduce Switching Noise
- 100-MHz Operation
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015
- Packaged in 48-Pin Shrink Small Outline (DL) Package
CDC318A General Description
1-Line To 18-Line Clock Driver With I2C Control Interface
CDC318A Features
- High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications
- Output Skew, tsk(o), Less Than 250 ps
- Pulse Skew, tsk(p), Less Than 500 ps
- Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs)
- I2C Serial Interface Provides Individual Enable Control for Each Output
- Operates at 3.3 V
- Distributed VCC and Ground Pins Reduce Switching Noise
- 100-MHz Operation
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015
- Packaged in 48-Pin Shrink Small Outline (DL) Package
CDC318A Typical Application
CDC318A Datasheet
MT58L64L18CT-10
Price: 4-6 USD
MT58L64L18CT-10 TQFP100
DL-7140-211M
Price: 5-6.5 USD
DL-7140-211M laser tube
74LVC74APG
Price: 4-5 USD
74LVC74APG - IC FLIP FLOP D-Type POS-EDG DUAL 14TSSOP
CY28346ZI-2
Price: 6.5-8 USD
CYPRESS - Clock Synthesizer with Differential CPU Outputs
PI5V330QEX
Price: 0.284-0.286 USD
PI5V330QEX Pericom Multiplexer Switch ICs
BSM300GA120DN2
Price: 1-2 USD
IGBT power module, Single switch, 1200 V, Collector-emitter voltage, 430A
SVA150XG04TB
Price: 1-2 USD
a-Si TFT-LCD, NEC, 228.096Hmm, 560V
PC354N1
Price: 0.124-0.2 USD
PC354N1T - Mini-flat Package, AC Input Type Photocoupler - Sharp Electrionic Components
RL1210JR-070R22L
Price: 0.177-0.178 USD
RL1210JR51-XX-BL - Thick Film Chip Resistor Low Ohmic - TAITRON Components Incorporated
STPS140A
Price: 0.053-0.055 USD
STPS140A - POWER SCHOTTKY RECTIFIER - STMicroelectronics
STA013
Price: 1.45-1.5 USD
STA013 - MPEG 2.5 LAYER III AUDIO DECODER - STMicroelectronics
SMBJ5347B
Price: 0.073-0.075 USD
SMBJ5347B - 5 Watt Surface Mount Silicon Zener Diodes - Micro Commercial Components
Quick search: ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789
