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CDC204N, CDC208, CDC208D

Table of contents:
Info of CDC204N
Info of CDC208
Info of CDC208D

CDC204N, CDC208, CDC208D Selling Leads, Datasheet

MFG:TI Package Cooled:DIP D/C:03+

CDC204N, CDC208, CDC208D Datasheet download

Five Points

Part Number: CDC204N

MFG: TI

Package Cooled: DIP

D/C: 03+

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CDC204N Parameters

CDC208 Features

Low-Skew Propagation Delay Specifications for Clock-Driver Applications
TTL-Compatible Inputs and CMOS-Compatible Outputs
Flow-Through Architecture Optimizes PCB Layout
Center-Pin V_CC and GND Pin Configurations Minimize High-Speed Switching Noise
EPIC^TM (Enhanced-Performance Implanted CMOS) 1-um Process
500-mA Typical Latch-Up Immunity at 125°C
Package Options Include Plastic Small-Outline (DW)

CDC204N General Description

5V Dual 1-to-4 clock driver

CDC204N Features

Low-Skew Propagation Delay Specifications for Clock-Driver Applications
TTL-Compatible Inputs and CMOS-Compatible Outputs
Flow-Through Architecture Optimizes PCB Layout
Center-Pin V_CC and GND Pin Configurations Minimize High-Speed Switching Noise
EPIC^TM (Enhanced-Performance Implanted CMOS) 1-um Process
500-mA Typical Latch-Up Immunity at 125°C
Package Options Include Plastic Small-Outline (DW)

CDC204N Typical Application

CDC208 Datasheet

CDC208 Parameters

CDC208 Features

Low-Skew Propagation Delay Specifications for Clock-Driver Applications
TTL-Compatible Inputs and CMOS-Compatible Outputs
Flow-Through Architecture Optimizes PCB Layout
Center-Pin V_CC and GND Pin Configurations Minimize High-Speed Switching Noise
EPIC^TM (Enhanced-Performance Implanted CMOS) 1-um Process
500-mA Typical Latch-Up Immunity at 125°C
Package Options Include Plastic Small-Outline (DW)

CDC208 General Description

5V Dual 1-to-4 clock driver

CDC208 Features

Low-Skew Propagation Delay Specifications for Clock-Driver Applications
TTL-Compatible Inputs and CMOS-Compatible Outputs
Flow-Through Architecture Optimizes PCB Layout
Center-Pin V_CC and GND Pin Configurations Minimize High-Speed Switching Noise
EPIC^TM (Enhanced-Performance Implanted CMOS) 1-um Process
500-mA Typical Latch-Up Immunity at 125°C
Package Options Include Plastic Small-Outline (DW)

CDC208 Typical Application

CDC208 Datasheet

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