AM79C930, AM79C93AKC, AM79C940 Selling Leads, Datasheet
MFG:AMD Package Cooled:QFP D/C:N/A
AM79C930, AM79C93AKC, AM79C940 Datasheet download
Part Number: AM79C930
MFG: AMD
Package Cooled: QFP
D/C: N/A
MFG:AMD Package Cooled:QFP D/C:N/A
AM79C930, AM79C93AKC, AM79C940 Datasheet download
MFG: AMD
Package Cooled: QFP
D/C: N/A
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Datasheet: AM79C930
File Size: 652946 KB
Manufacturer: AMD [Advanced Micro Devices]
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Datasheet: AM79C940
File Size: 661653 KB
Manufacturer: AMD [Advanced Micro Devices]
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PCnet-Mobile (Am79C930) is the first in a series of mobile networking products in AMD's PCnet family. The Am79C930 device is the first single-chip wireless LAN media access controller (MAC) supporting the IEEE 802.11 (draft) standard and the Xircom Netwave™ MAC protocols. The Am79C930 device is designed to have a flexible protocol engine to allow for industry standard and proprietary protocols. Protocol firmware for Xircom Netwave and IEEE 802.11 (draft) MAC protocols are supplied by AMD. It is pin-compatible with the PCMCIA bus or the ISA (Plug and Play) bus through a pin-strapping option.
The Am79C930 device contains a PCMCIA/ISA bus interface unit (BIU), a MAC control unit, and atransceiver attachment interface (TAI). The TAI supports frequency-hopping spread spectrum, direct sequence spread spectrum, and infrared physical layer interfaces. In addition, a power down function has been incorporated to provide low standby current for powersensitive applications.
The Am79C930 device provides users with a media access controller that has flexibility (i.e., bus interface, protocol, and physical layer support) to allow the design of multiple products using a single device. By having all the necessary MAC functions on a single chip, users only need to add memory and the physical layer in order to deliver a fully functional wireless LAN connection.
`Capable of supporting the IEEE 802.11 standard (draft)
` Supports the Xircom Netwave™ media access control (MAC) protocols
`Supports MAC layer functions
` Individual 8-byte transmit and 15-byte receive FIFOs
` Integrated intelligent 80188 processor for MAC layer functions
` Glueless PCMCIA bus interface conforming to PC Card standard-Feb. 1995
` Full PCMCIA software interface support for PC Card standard-Feb. 1995
`Glueless ISA (IEEE P996) bus interface with full support for Plug and Play release 1.0a
`Glueless SRAM interface for MAC operations, supporting up to 128 Kbytes of memory
`Antenna diversity selection support
`Fabricated with submicron CMOS technology with low operating current
`Supports dual 3 V and 5 V supply applications
`Low-power mode allows reduced power consumption for critical battery-powered applications
`144-pin Thin Quad Flat Pack (TQFP) package available for space-critical applications, such as PCMCIA
`JTAG Boundary Scan (IEEE 1149.1) test access port for board-level production test
The Media Access Controller for Ethernet (MACE) chip is a CMOS VLSI device designed to provide flexibility in customized LAN design. The MACE device is specifically designed to address applications where multiple I/O peripherals are present, and a centralized or system specific DMA is required. The high speed, 16-bit synchronous system interface is optimized for an external DMA or I/O processor system, and is similar to many existing peripheral devices, such as SCSI and serial link controllers.
The MACE device is a slave register based peripheral. All transfers to and from the system are performed using simple memory or I/O read and write commands. In conjunction with a user defined DMA engine, the MACE chip provides an IEEE 802.3 interface tailored to aspecific application. Its superior modular architecture and versatile system interface allow the MACE device to be configured as a stand-alone device or as a connectivity cell incorporated into a larger, integrated system.
The MACE device provides a complete Ethernet node solution with an integrated 10BASE-T transceiver, and supports up to 25-MHz system clocks. The MACE device embodies the Media Access Control (MAC) and Physical Signaling (PLS) sub-layers of the IEEE 802.3 standard, and provides an IEEE defined Attachment Unit Interface (AUI) for coupling to an external Medium Attachment Unit (MAU). The MACE device is compliant with 10BASE2, 10BASE5, 10BASE-T, and 10BASE-F transceivers.
Additional features also enhance over-all system design. The individual transmit and receive FIFOs optimize system overhead, providing substantial latency during packet transmission and reception, and minimizing intervention during normal network error recovery. The integrated Manchester encoder/decoder eliminates the need for an external Serial Interface Adapter (SIA) in the node system. If support for an external encoding/decoding scheme is desired, the General Purpose Serial Interface (GPSI) allows direct access to/from the MAC. In addition, the Digital Attachment Interface (DAI), which is a simplified electrical attachment specification, allows implementation of MAUs that do not require DC isolation between the MAU and DTE. The DAI port can also be used to indicate transmit, receive, or collision status by connecting LEDs to the port. The MACE device also provides an External Address Detection Interface (EADI) to allow external hardware address filtering in internetworking applications.
The Am79C940 MACE chip is offered in a Plastic Leadless Chip Carrier (84-pin PLCC), a Plastic Quad Flat Package (100-pin PQFP), and a Thin Quad Flat Package (TQFP 80-pin). There are several small functional and physical differences between the 80-pin TQFP and the 84-pin PLCC and 100-pin PQFP configurations.
Because of the smaller number of pins in the TQFP configuration versus the PLCC configuration, four pins are not bonded out. Though the die is identical in all three package configurations, the removal of these four pins does cause some functionality differences between the TQFP and the PLCC and PQFP configurations. Depending on the application, the removal of these pins will or will not have an effect.