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The 87C196KR/KQ JV/JT JR/JQ devices represent the fourth generation of MCSÉ 96 Microcontroller products implemented on Intel's advanced 1 micron process technology. These products are based on the 80C196KB device with improvements for automotive applications. The instruction set is a true super set of 80C196KB. The 87C196JR is a 52-pin version of the 87C196KR device, while the 87C196KQ/JQ are memory scalars of the 87C196KR/JR.
The 87C196JV/JT A-step devices (JV-A, JT-A) are the newest members of the MCS 96 microcontroller family. These devices are memory scalars of the 87C196JR D-step (JR-D) and are designed for strict functional and electrical compatibility. The JT-A has 32 Kbytes of on-chip EPROM, 1.0 Kbytes of Register RAM and 512 bytes of Code RAM. The JV-A has 48 Kbytes of on-chip EPROM, 1.5 Kbytes of Register RAM and 512 bytes of Code RAM.
87C196KR Maximum Ratings
Storage Temperature ..............................-60to +150 Voltage from VPP or EA to VSS or ANGND.........................................-0.5V to +13.0V Voltage from Any Other Pin to VSS or ANGND .....................................-0.5V to +7.0V This includes VPP on ROM and CPU devices. Power Dissipation...................................................0.5W
NOTICE: This is a production data sheet. The specifications are subject to change without notice.
*WARNING: Stressing the device beyond the ``Absolute Maximum Ratings'' may cause permanent damage. These are stress ratings only. Operation beyond the ``Operating Conditions'' is not recommended and extended exposure beyond the ``Operating Conditions'' may affect device reliability.
87C196KR Features
-40 to +125 Ambient High Performance CHMOS 16-Bit CPU Up to 48 Kbytes of On-Chip EPROM Up to 1.5 Kbytes of On-Chip Register RAM Up to 512 Bytes of Additional RAM (Code RAM) Register-Register Architecture Up to 8 Channel/10-Bit A/D with Sample/Hold Up to 37 Prioritized Interrupt Sources Up to Seven 8-Bit (56) I/O Ports Full Duplex Serial I/O Port Dedicated Baud Rate Generator Interprocessor Communication Slave Port High Speed Peripheral Transaction Server (PTS) Two 16-Bit Software Timers 10 High Speed Capture/Compare (EPA) Full Duplex Synchronous Serial I/O Port (SSIO) Two Flexible 16-Bit Timer/Counters Quadrature Counting Inputs Flexible 8-/16-Bit External Bus Programmable Bus (HLD/HLDA) 1.75 ms 16 x 16 Multiply 3 ms 32/16 Divide 68-Pin and 52-Pin PLCC Packages