MFG:Capital Advanced Technologies Category:Prototyping Products Package Cooled:LA3805 D/C:SANYO
6405, 6405217-6 7C199-35/25KMB, 6405452 Datasheet download
Category: Prototyping Products
MFG: Capital Advanced Technologies
Package Cooled: LA3805
D/C: SANYO
Description: PROTO-BRD 5PIN DISCRETE SMD SIP
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PDF/DataSheet Download
Datasheet: 640
File Size: 116301 KB
Manufacturer: LITTELFUSE [Littelfuse]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: 640
File Size: 116301 KB
Manufacturer: LITTELFUSE [Littelfuse]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: 640
File Size: 116301 KB
Manufacturer: LITTELFUSE [Littelfuse]
Download : Click here to Download
| Technical/Catalog Information | 6405 |
| Vendor | Capital Advanced Technologies |
| Category | Prototyping Products |
| Proto Board Type | Surfboard |
| Size / Dimension | 0.50" x 0.50" (12.7mm x 12.7mm) |
| Material | FR4 Fiberglass |
| Board Thickness | 0.031" (0.79mm) |
| Hole Diameter | - |
| Number of Positions | 5 |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Other Names | 6405 6405 6405CA ND 6405CAND 6405CA |
The LM2940 positive voltage regulator features the ability to source 1A of ouput current with a dropout voltage of typically 0.5V and a maximum of 1V over the entire temperature range. Furthermore, a quiescent current reduction circuit has been included which reduces the ground current when the differential between the input voltage and the output voltage exceeds approximately 3V. The quiescent current with 1A of output current and an input-output differential of 5V is therefore only 30 mA. Higher quiescent currents only exist when the regulator is in the dropout mode (Vin - Vout < 3V).
Designed also for vehicular applications, the LM2940 and all regulated circuitry are protected from reverse battery installations or 2-battery jumps. During line transients,such as load dump when the input voltage can momentarily exceed the specified maximum operating voltage, the regulator will automatically shut down to protect both the internal circuits and the load. The LM2940 cannot be harmed by temporary mirror-image insertion.Familiar regulator features such as short circuit and thermal overload protection are also provided.
Input Voltage (Survival Voltage <100ms)
60V
Internal Power Dissipation
(Note 2, 3)
Internally Limited
Maximum Junction Temperature
150 C
Storage Temperature Range
-65 C to +150 C
Thermal Resistance
ThetaJA
T03 Pkg (Still Air) TBD
T03 Pkg (500LF/Min Air flow) TBD
CERDIP (Still Air) 73 C/W
CERDIP (500LF/Min Air flow) 37 C/W
ThetaJC
T03 TBD
CERDIP (Note 3 applicable to this Pkg only) 3 C/W
(Note 3)
Lead Temperature
(Soldering, 10 seconds) 300 C
ESD Susceptibility
(Note 4)
4000V
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur.Operating Ratings are conditions for which the device is functional, but do not guaranteed specific performance limits. For guaranteed specifications and test conditions see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA)/ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower.
Note 3: The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full advantage of this improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either metal traces on, or thermal vias through, the printed circuit board. Without this additional heat sinking, device power dissipation must be calculated using junction-to-ambient, rather than junction-to-case, thermal resistance. It must not be assumed that the device leads will provide substantial heat transfer out of the package, since the thermal resistance of the leadframe material is very poor, relative to the material of the package base. The stated junction-to-case thermal resistance is for the package material only, and does not account for the additional thermal resistance between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance and must combine this with the stated value for the package, to calculate the total allowed power dissipation for the device.
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