ispPAC®20

Features: • IN-SYSTEM PROGRAMMABLE (ISP™) ANALOG - Two Instrument Amplifier Gain/Attenuation Stages - Signal Summation (Up to 3 Inputs) - Precision Active Filtering (10kHz to 100kHz) - 8-Bit DAC and Fast Dual Comparator - Non-Volatile E2CMOS® Cells (10,000 Cycles) - IEEE 1149.1 JTA...

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SeekIC No. : 004381233 Detail

ispPAC®20: Features: • IN-SYSTEM PROGRAMMABLE (ISP™) ANALOG - Two Instrument Amplifier Gain/Attenuation Stages - Signal Summation (Up to 3 Inputs) - Precision Active Filtering (10kHz to 100kHz) - 8...

floor Price/Ceiling Price

Part Number:
ispPAC®20
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

• IN-SYSTEM PROGRAMMABLE (ISP™) ANALOG
  - Two Instrument Amplifier Gain/Attenuation Stages
  - Signal Summation (Up to 3 Inputs)
  - Precision Active Filtering (10kHz to 100kHz)
  - 8-Bit DAC and Fast Dual Comparator
  - Non-Volatile E2CMOS® Cells (10,000 Cycles)
  - IEEE 1149.1 JTAG Serial Port Programming
• LINEAR ELEMENT BUILDING BLOCKS
  - Programmable Gain Range (0dB to 40dB)
  - Bandwidth of 550kHz (G=1), 330kHz (G=10)
  - Low Distortion (THD < -74dB max @ 10kHz)
  - Auto-Calibrated Input Offset Voltage
• TRUE DIFFERENTIAL I/O
  - High CMR (69dB) Instrument Amplifier Inputs
  - 2.5V Common Mode Reference on Chip
  - Rail-to-Rail Voltage Outputs
  - Single Supply 5V Operation
• 44-PIN PLASTIC PLCC AND TQFP PACKAGES
• APPLICATIONS INCLUDE INTEGRATED:
  - Single +5V Supply Signal Conditioning
  - Active Filters, Gain Stages, Summing Blocks
  - Analog Front Ends, 12-Bit Data Acq. Systems
  - Precision Voltage Controlled Oscillator
  - Synchronous Detection Circuits
  - Precision Rectification & Other Non-Linear Functions



Pinout

  Connection Diagram


Specifications

Supply Voltage VS ................................................-0.5 to +7V
Logic and Analog Input Voltage Applied .................... 0 to VS
Logic and Analog Output Short Circuit Duration ..... Indefinite
Lead Temperature (Soldering, 10 sec.) ....................... 260°C
Ambient Temperature with Power Applied ........ -55 to 125°C
Storage Temperature ....................................... -65 to 150°C

Note: Stresses above those listed may cause permanent damage to the device. These are stress only ratings and
functional operation of the device at these or at any other conditions above those indicated in the operational sections of this specification is not implied.




Description

The ispPAC20 is a member of the Lattice family of In-n System Programmable analog circuits, digitally configured via nonvolatile E2CMOS technology.

Analog building blocks, called PACblocks, replace traditional analog components such as opamps and active filters, eliminating the need for most external resistors and capacitors. Also included are an 8-bit DAC and dual comparators. With no requirement for external configuration components, ispPAC20 expedites the design process,
simplifying prototype circuit implementation and change, while providing high-performance integrated functionality.

Designers configure the ispPAC20 and verify its performance using PAC-Designer®, an easy-to-use, Microsoft
Windows® compatible program. Device programming is supported using PC parallel port I/O operations.

The ispPAC20 is configured through its IEEE Standard 1149.1 (JTAG) compliant serial port. The flexible In-System
Programming capability enables programming, verification and reconfiguration if desired, directly on the printed circuit board.




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