TMS664164

Features: `Pipeline Architecture (Single-Cycle Architecture)`Single Write/Read Burst`Self-Refresh Capability (Every 16 s)`Low-Noise, Low-Voltage Transistor-Transistor Logic (LVTTL) Interface`Power-Down Mode`Compatible With JEDEC Standards`16K RAS-Only Refresh (Total for All Banks)`4K Auto Refresh...

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SeekIC No. : 004525178 Detail

TMS664164: Features: `Pipeline Architecture (Single-Cycle Architecture)`Single Write/Read Burst`Self-Refresh Capability (Every 16 s)`Low-Noise, Low-Voltage Transistor-Transistor Logic (LVTTL) Interface`Power-...

floor Price/Ceiling Price

Part Number:
TMS664164
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/1/11

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Product Details

Description



Features:

`Pipeline Architecture (Single-Cycle Architecture)
`Single Write/Read Burst
`Self-Refresh Capability (Every 16 s)
`Low-Noise, Low-Voltage
   Transistor-Transistor Logic (LVTTL) Interface
`Power-Down Mode
`Compatible With JEDEC Standards
`16K RAS-Only Refresh (Total for All Banks)
`4K Auto Refresh (Total for All Banks)/64 ms
`Automatic Precharge and Controlled Precharge
`Burst Interruptions Supported:
Read Interruption
Write Interruption
Precharge Interruption
`Support Clock-Suspend Operation (Hold Command)
`Intel PC100 Compliant (-8 and -8A parts)



Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Supply voltage range for output drivers, VCCQ . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Voltage range on any input pin (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Voltage range on any output pin (see Note 1) . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Short-circuit output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
Operating ambient temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0to 70Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55to 150

 Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to VSS.



Description

The TMS664164 series are 67108864-bit synchronous dynamic random-access memory (SDRAM) devices which are organized as follow:
·Four banks of 1 048 576 words with 16 bits per word
·Four banks of 2097152 words with 8 bits per word
·Four banks of 4194304 words with 4 bits per word

All inputs and outputs of the TMS664xx4 series are compatible with the LVTTL interface.

The SDRAM employs state-of-the-art technology for high-performance, reliability, and low power. All inputs and outputs are synchronized with the CLK input to simplify system design and to enhance use with high-speed microprocessors and caches.
The TMS664164 SDRAM is available in a 400-mil, 54-pin surface-mount thin small-outline package (TSOP)
(DGE suffix).




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