TMS470R1A128

The TMS470R1A128(2) devices are members of the Texas Instruments (TI) TMS470R1x family of general-purpose16/32-bit reduced instruction set computer (RISC) microcontrollers. The TMS470R1x microcontroller offers high performance utilizing the high-speed ARM7TDMI 16/32-bit RISC central processing unit (CPU), resulting in a high instruction throughput while maintaining greater code efficiency. The ARM7TDMI 16/32-bit RISC CPU views memory as a linear collection of bytes numbered upwards from zero. The A128 utilizes the big-endian format, where the most significant byte of a word is stored at the lowest numbered byte and the least significant byte at the highest numbered byte.

High-end embedded control applications demand more performance from their controllers while maintaining low costs. The A128 RISC core architecture offers solutions to these performance and cost demands while maintaining low power consumption.

The A128 devices contain the following:
· ARM7TDMI 16/32-Bit RISC CPU
· TMS470R1x system module (SYS) with 470+ enhancements
· 128K-byte flash
· 8K-byte SRAM
· Zero-pin phase-locked loop (ZPLL) clock module
· Analog watchdog (AWD) timer
· Real-time interrupt (RTI) module
· Two serial peripheral interface (SPI) modules
· Two serial communications interface (SCI) modules
· Standard CAN controller (SCC)
· Class II serial interface (C2SIa)
· 10-bit, 16-input channel multi-buffered analog-to-digital converter (MibADC)
· High-end timer (HET) controlling 16 I/Os
· External Clock Prescale (ECP)
· Up to 49 I/O pins and 1 input-only pin

The functions performed by the 470+ system module (SYS) include:
· Address decoding
· Memory protection
· Memory and peripherals bus supervision
· Reset and abort exception management
· Prioritization for all internal interrupt sources
· Device clock control
· Parallel signature analysis (PSA)

This data sheet includes device-specific information such as memory and peripheral select assignment, interrupt priority, and a device memory map. For a more detailed functional description of the SYS module, see the TMS470R1x System Module Reference Guide (literature number SPNU189).

The A128 memory includes general-purpose SRAM supporting single-cycle read/write accesses in byte, halfword, and word modes.

The flash memory on the A128 devices is a nonvolatile, electrically erasable and programmable memory implemented with a 32-bit-wide data bus interface.The flash operates with a system clock frequency of up to 28 MHz. In pipeline mode, the flash operates with a system clock frequency of up to 48 MHz. For more detailed information on the flash, see the F05 flash section of this data sheet and the TMS470R1x F05 Flash Reference Guide (literature number SPNU213).