Features: ` SUPPLY VOLTAGE VDD = 2.7V to 3.6V Core Power Supply VDDQ= 1.65V to 3.6V for Input/Output VPP = 12V for fast Program (optional)` ACCESS TIME: 70, 85, 90,100ns` PROGRAMMING TIME 10s typical Double Word Programming Option` COMMON FLASH INTERFACE 64 bit Security Code` MEMORY BLOCKS Paramet...
M28W160BB: Features: ` SUPPLY VOLTAGE VDD = 2.7V to 3.6V Core Power Supply VDDQ= 1.65V to 3.6V for Input/Output VPP = 12V for fast Program (optional)` ACCESS TIME: 70, 85, 90,100ns` PROGRAMMING TIME 10s typica...
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Symbol | Parameter | Value | Unit | |
Min | Max | |||
TA | Ambient Operating Temperature (1) | -40 | 85 | °C |
TBIAS | Temperature Under Bias | -40 | 125 | °C |
TSTG | Storage Temperature | -55 | 155 | °C |
VIO | Input or Output Voltage | -0.6 | VDDQ+0.6 | v |
VDD, VDDQ | Supply Voltage | -0.6 | 4.1 | v |
VPP | Program Voltage | -0.6 | 13 | v |
The M28W160B is a 16 Mbit (1 Mbit x 16) non-volatile Flash memory that can be erased electrically at the block level and programmed in-system on a Word-by-Word basis. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. VDDQ allows to drive the I/O pin down to 1.65V. An optional 12V VPP power supply is provided to speed up customer programming.
The device features an asymmetrical blocked architecture. The M28W160B has an array of 39 blocks: 8 Parameter Blocks of 4 KWord and 31 Main Blocks of 32 KWord. M28W160BT has the Parameter Blocks at the top of the memory address space while the M28W160BB locates the Parameter Blocks starting from the bottom. The memory maps are shown in Figure 6, Block Addresses. Parameter blocks 0 and 1 can be protected from accidental programming or erasure. Each block can be erased separately. Erase can be suspended in order to perform either read or program in any other block and then resumed. Program can be suspended to read data in any other block and then resumed. Each block can be programmed and erased over 100,000 cycles.
Program and Erase commands of M28W160BB are written to the Command Interface of the memory. An on-chip Program/Erase Controller takes care of the timings necessary for program and erase operations. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards.
The memory is offered in TSOP48 (10 X 20mm), BGA46 (6.39 x 6.37mm, 0.75mm pitch) and TFBGA46 (6.39 x 6.37mm, 0.75mm pitch) packages and is supplied with all the bits erased (set to '1').