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YSS932

Features: [ DIR Block ] • Sampling frequency: Two ranges are available including; 32k to 48kHz (normal rate) and 64k to 96kHz (double rate). • Provides master clock, 256fs, to DAC, ADC and the other peripheral devices. The clock output can be controlled with various modes determined by...

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SeekIC No. : 004550053 Detail

YSS932: Features: [ DIR Block ] • Sampling frequency: Two ranges are available including; 32k to 48kHz (normal rate) and 64k to 96kHz (double rate). • Provides master clock, 256fs, to DAC, ADC a...

YSS932 Data Sheet

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Part Number:
YSS932
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

[ DIR Block ]
   • Sampling frequency: Two ranges are available including; 32k to 48kHz (normal rate) and 64k to 96kHz (double rate).
   • Provides master clock, 256fs, to DAC, ADC and the other peripheral devices. The clock output can be controlled with various modes determined by       register settings.
   • Has a pin that indicates the double rate operation.
   • Every channel status and user data can be read through the microprocessor interface.
   • Has an output pin for interrupt that is activated by changing of the status information.
   • Internal operation frequency: 25MHz
[ Main DSP Block ]
   • Dolby Digital (AC-3) / Pro Logic II and DTS decode.
   • High quality internal 24 bit DSP.
   • No external memory is required. (Memory for the center and surround channel signal delay is included.)
   • AC-3 Karaoke mode.
   • Supports compression mode at AC-3 / DTS decoding.
   • Included de-emphasis filter for the PCM signal.
   • Pro Logic II decoding for Dolby Digital 2 channels decoded signal as well as ordinary PCM signal.
   • Reads Dolby Digital / DTS decode information through the microprocessor interface.
   • Internal operation frequency: 30MHz
[ Sub DSP Block ]
   • Capable of realizing various sound fields, such as simulation surround, output configuration and virtual surround by downloading the programs from the       microprocessor.
   • Adoption of the 32 bit floating-point DSP assuring highly accurate processing.
   • Up to 2.73 seconds delay at fs=48kHz achievable by adding DRAM or SRAM externally.
   • Internal operation frequency: 30MHz
[ Other Features ]
   • Connectable to almost all ADC and DAC by making appropriate settings to the control register.
   • Total of 16 general purpose input/output ports are provided.
   • 2 built-in PLL circuits for generation of operation clocks for DIR block and DSP blocks.
   • Power supply voltage: 2 power sources (2.5V for core logic section and 3.3V for I/O section)
   • Si-gate CMOS process
   • 128SQFP (YSS932-S)


Pinout

Connection Diagram


Specifications

Parameter Symbol Condition Min. Typ. Max. Unit
Power Supply Voltage VDD1 except XI pin *1
XI pin		 Vss-0.5   4.6 V
  AVDD Vss-0.5   4.6 V
  VDD2 Vss-0.5   3.6 V
Input Voltage VI -0.5   5.75 V
    -0.5   VDD1+0.5 V
Storage Temperature Tstg -50   125 °C



Description

YSS932 consists of three blocks; the Main DSP block where AC-3 / Pro Logic II / DTS decoding is executed, the Sub DSP block where various sound field effects are added and the SPDIF receiver (DIR) block.

The Sub DSP YSS932 is a 8 channel input / 8 channel output programmable DSP exclusively for sound field processing. It can apply such effects as simulation surround, output configuration and virtual surround. In addition, with SRAM or DRAM connected, it can produce reverberation up to 2.73 seconds delay at fs=48kHz. By using this function, it is possible to simulate various sound fields such as a hall or a church.

The YSS932 SPDIF receiver (DIR) can handle the digital audio interface format input signals of the sampling frequency 32kHz through 96kHz.

If adopting some technology owned by another company is desired for use in Sub DSP block, note that a separate contract may be required between the owner of that technology and the user with respect to adoption of the technology.




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