YSS902

Features: ·Dolby Digital 5.1 channel full decode.·24 bit DSP. (Group-A Dolby Digital decoder)·No external memory is required. (Memory for center and surround channel delay is included)·Possible to decode multi-language encoded data. (possible to decode based on data-stream-number)·AC-3 karaoke mod...

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YSS902 Picture
SeekIC No. : 004550048 Detail

YSS902: Features: ·Dolby Digital 5.1 channel full decode.·24 bit DSP. (Group-A Dolby Digital decoder)·No external memory is required. (Memory for center and surround channel delay is included)·Possible to d...

floor Price/Ceiling Price

Part Number:
YSS902
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/16

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Product Details

Description



Features:

·Dolby Digital 5.1 channel full decode.
·24 bit DSP. (Group-A Dolby Digital decoder)
·No external memory is required. (Memory for center and surround channel delay is included)
·Possible to decode multi-language encoded data. (possible to decode based on data-stream-number)
·AC-3 karaoke mode.
·Original compression mode as well as four compression modes recommended by Dolby.
·Dolby Digital decoding latency is fixed to two audio blocks (512 samples).
·Included de-emphasis filter.
·Pro Logic decoding for Dolby Digital 2 channels decoded signal as well as ordinary PCM.
·High performance 25 MIPS programmable DSP suitable for a variety of sound field processing such as original surround, filtering, virtual surround etc.
·Up to 1.36 second delay time is capable when used with an external 1Mbit SRAM. (at fs= 48 kHz)
·Reads Dolby Digital decode information through the microprocessor interface.
·Provide total sixteen I/O ports.
·Possible to connect most of SPDIF receivers, A/D and D/A converters, by setting I/O data interface format.
·Has a built-in PLL oscillation circuit to generates its own operating clock.
·Internal operating clock is 25MHz.
·Supply Voltage: 3.3v for core logic. 5v for I/Os.
·Power saving mode.
·Si-gate CMOS process.
·100 QFP.(YSS902-F)




Pinout

  Connection Diagram


Specifications

Parameter Symbol Min. Max. Unit
Power Supply Voltage VDD1
VDD2, AVDD
Vss-0.5
Vss-0.5
Vss+7.0
VSS+4.6
V
V
Input Voltage VI Vss-0.5 VDD1+0.5 V
Storage Temperature Tstg -50 125



Description

The YSS902 is one chip LSI consisting of two built-in DSP's ; Dolby Digital (AC-3) / Pro Logic (Main DSP) and a sound processing DSP (Sub DSP). Sub DSP is capable of realizing various sound fields, such as virtual surround, by down-loading the program and coefficient.




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