XRK32510

• Spread Spectrum Clock Compatible
• Operating frequency range: 25MHz to 175MHz
• Low noise
• Low jitter internal PLL
• No external RC filter components required
• Meets or exceeds DPC133 registered DIMM specification 1.1
• Output Enable (OE) pin can be used to disable the CLCK_OUT pins
• Operating supply of 3.3V VDD
• Plastic 24 Pin TSSOP package

The XRK32510 is a high performance, low jitter, low skew clock driver. The XRK32510 uses phase-lock loop (PLL) tecnology to synthesize the CLK_IN signal into 10 output signals (QA), synchronized in both phase and frequency. XRK32510 features low skew, low jitter and 50% duty cycle making it a perfect fit in dual in line memory module (DIMM) board clocking, PC133 SDRAM designs and other server applications.

The 10 outputs can be disabled using the Output Enable (OE) pin.

By connecting the Feedback Output (FB_OUT) signal to the Feedback Input (FB_IN) signal, the propagation delay from CLK_IN to the 10 buffered Outputs is nearly zero.