XC2V1000E-4FGG456C

The XC2V1000E-4FGG456C is designed as one member of the virtex-II family which is a platform FPGA developed for high performance from low-density to high-density designs that are based on IP cores and customized modules. The family delivers complete solutions for telecommunication, wireless, networking, video, and DSP applications, including PCI, LVDS, and DDR interfaces.

XC2V1000E-4FGG456C has many features. (1) Industry first platform FPGA solution. (2) IP-immersion architecture which means densities from 40K to 8M system gates, 420MHz internal clock speed (advance data) and 840+ Mb/s I/O (advance data). (3) SelectRAM memory hierarchy. (4) Arithmetic functions which means dedicated 18-bit x 18-bit multiplier blocks and fast look ahead carry logic chains. (5) Flexible logic resources. (6) High-performance clock management circuitry. (7) Active interconnect technology. (8) SelectI/O-ultra technology. (9) Supported by xilinx foundation and alliance series development systems. (10) SRAM-based in-system configuration. (11) 0.15m 8-layer metal process with 0.12m high-speed transistors. (12) 1.5 V (VCCINT) core power supply, dedicated 3.3V VCCAUX auxiliary and VCCO I/O power supplies. (13) IEEE 1149.1 compatible boundary-scan logic support. (14) Flip-chip and wire-bond ball grid array (BGA) packages in three standard fine pitches (0.80mm, 1.00mm, and 1.27mm). (15) 100% factory tested. That are all the main features.

Some important specifications of XC2V1000E-4FGG456C have been concluded into several points as follow. (1) Its system gates would be 1M. (2) Its array row x col would be 40 x 32. (3) Its sllces would be 5120. (4) Its maximum distributed RAM Kbits would be 160. (5) Its multipller blocks would be 40. (6) Its 18-Kbit blocks would be 40. (7) Its max RAM kbits would be 720. (8) Its DCMs would be 8. (9) Its max I/O pads would be 432. And so on. If you have any question or suggestion or want to know more information of XC2V1000E-4FGG456C please contact us for details. Thank you!