DescriptionThe XC2V1000-4FG456C is designed as the field-programmable gate arrays that belongs to the Virtex-II family. It is one kind of user-programmable gate arrays with various configurable elements and is optimized for high-density and high-performance logic designs. Also this device has a ne...
XC2V1000-4FG456C: DescriptionThe XC2V1000-4FG456C is designed as the field-programmable gate arrays that belongs to the Virtex-II family. It is one kind of user-programmable gate arrays with various configurable elem...
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The XC2V1000-4FG456C is designed as the field-programmable gate arrays that belongs to the Virtex-II family. It is one kind of user-programmable gate arrays with various configurable elements and is optimized for high-density and high-performance logic designs. Also this device has a new generation of programmable routing resources called active interconnect technology interconnects all of these elements.
Features of the XC2V1000-4FG456C are:(1)industry first platform FPGA solution;(2)densities from 40K to 8M system gates;(3)420 MHz internal clock speed (aAdvance data);(4)840+ Mb/s I/O (advance data);(5)100% factory tested;(6)IEEE 1149.1 compatible boundary-scan logic support;(7)0.15 m 8-layer metal process with 0.12 m high-speed transistors;(8)SRAM-based in-system configuration;(9)proprietary high-performance selectLink technology.
The XC2V1000-4FG456C has 16 global clock MUX buffers, with up to eight clock nets per quadrant. Each global clock MUX buffer can select one of the two clock inputs and switch glitch-free from one clock to the other. Each DCM block is able to drive up to four of the 16 global clock MUX buffers. If you want to know more information such as the electrical characteristics about the XC2V1000-4FG456C, please download the datasheet in www.seekic.com or www.chinaicmart.com .