XC226x

Features: For a quick overview or reference, the XC226x's properties are listed here in a condensed way.• High Performance 16-bit CPU with 5-Stage Pipeline 15 ns Instruction Cycle Time at 66 MHz CPU Clock (Single-Cycle Execution) 1-Cycle 32-bit Addition and Subtraction with 40-bit result 1-C...

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XC226x Picture
SeekIC No. : 004547767 Detail

XC226x: Features: For a quick overview or reference, the XC226x's properties are listed here in a condensed way.• High Performance 16-bit CPU with 5-Stage Pipeline 15 ns Instruction Cycle Time at 66 M...

floor Price/Ceiling Price

Part Number:
XC226x
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

For a quick overview or reference, the XC226x's properties are listed here in a condensed way.
• High Performance 16-bit CPU with 5-Stage Pipeline
15 ns Instruction Cycle Time at 66 MHz CPU Clock (Single-Cycle Execution)
1-Cycle 32-bit Addition and Subtraction with 40-bit result
1-Cycle Multiplication (16 * 16 bit)
1-Cycle Multiply-and-Accumulate (MAC) Instructions
Background Division (32 / 16 bit) in 21 Cycles
Enhanced Boolean Bit Manipulation Facilities
Zero-Cycle Jump Execution
Additional Instructions to Support HLL and Operating Systems
Register-Based Design with Multiple Variable Register Banks
Fast Context Switching Support with Two Additional Local Register Banks
16 Mbytes Total Linear Address Space for Code and Data
1024 Bytes On-Chip Special Function Register Area (C166 Family Compatible)
• 16-Priority-Level Interrupt System with up to 87 Sources, Selectable External Inputs for Interrupt Generation and Wake-Up, Sample-Rate down to 15 ns
• 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC), 24-Bit Pointers Cover Total Address Space
• Clock Generation from Internal or External Clock Sources,
via on-chip PLL or via Prescaler
• On-Chip Memory Modules
1 Kbyte On-Chip Stand-By RAM (SBRAM)
2 Kbytes On-Chip Dual-Port RAM (DPRAM)
16 Kbytes On-Chip Data SRAM (DSRAM)
Up to 64 Kbytes On-Chip Program/Data SRAM (PSRAM)
Up to 768 Kbytes On-Chip Program Memory (Flash Memory)
• On-Chip Peripheral Modules
Two Synchronizable A/D Converters with a total of 16 Channels, 10-bit Resolution, Conversion Time down to 1.2 s, Optional Data Preprocessing (Data Reduction, Range Check)
16-Channel General Purpose Capture/Compare Unit (CAPCOM2)
Up to four Capture/Compare Units for flexible PWM Signal Generation (CCU6x)
Multi-Functional General Purpose Timer Unit with 5 Timers
Six Serial Interface Channels to be used as UART, LIN, High-Speed Synchronous Channel (SPI/QSPI), IIC Bus Interface (10-bit addressing, 400 kbit/s), IIS Interface





Pinout

  Connection Diagram


Specifications

Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Storage temperature TST -65 150
Junction temperature TJ -40 150 under bias
Voltage on VDDI pins with
respect to ground (VSS)
VDDIM,
VDDI1
-0.5 1.65 V
Voltage on VDDP pins with
respect to ground (VSS)
VDDPA,
VDDPB
-0.5 6.0 V
Voltage on any pin with
respect to ground (VSS)
VIN -0.5 VDDP
+ 0.5
V VIN < VDDPmax
Input current on any pin
during overload condition
-10 10 mA
Absolute sum of all input
currents during overload
condition
|100| mA

Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
During absolute maximum rating overload conditions (VIN > VDDP or VIN < VSS) the voltage on VDDP pins with respect to ground (VSS) must not exceed the values defined by the absolute maximum ratings






Description






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