DescriptionThe logic cell array is a high density CMOS integrated circuit.Its user-programmable array architecture is made up og three types of configurable elements:Input/Output blocks, logic blocks and interconnect.The designer of XC2064 can define individual I/O blocks for interface to external...
XC2064: DescriptionThe logic cell array is a high density CMOS integrated circuit.Its user-programmable array architecture is made up og three types of configurable elements:Input/Output blocks, logic block...
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The logic cell array is a high density CMOS integrated circuit.Its user-programmable array architecture is made up og three types of configurable elements:Input/Output blocks, logic blocks and interconnect.The designer of XC2064 can define individual I/O blocks for interface to external circuitry, define logic blocks to implement logic functions and define interconnection networks to compose larger scale logic functions.The XACT development system provides interactive graphic design capture and automatic routing.Both simulation and in-cirucit emulation are available for design verification.
Features of of the XC2064 are:(1)fully field-programmable:I/O functions;digital logic functions; interconnections; (2)general-purpose array architecture; (3)complete user control of design cycle; (4)compatible arrays with logic cell complexity equivalent to 1200 and 1800 gates; (5)standard product availability; (6)100% factory-tested; (7)TTL or CMOS input thresholds; (8)complete development system support.
The absolute maximum ratings of the XC2064 can be summarized as:(1)supply voltage relative to GND(Vcc) is -0.5 V to +7.0 V; (2)input voltage with respect to GND(VIN) is -0.5 V to Vcc+0.5 V; (3)voltage applied to 3-state output(VTS) is -0.5 V to Vcc+0.5 V; (4)storage temperature(ambient)(Tstg) is -65 to 150; (5)maximum soldering temperature(Tsol) is +260(10 s at 1/16 pin).The operating conditions of the XC2064 can be summarized as:(1): high level input voltage-TTL configuraiton(VIHT) is 2.0 V min and Vcc max; (2): low level input voltage-TTL configuration(VILT) is 0 V min and 0.8 V max; (3): high level input voltage-CMOS configuration(VIHC) is 70% Vcc min and 100% Vcc max; (4): low level input voltage-CMOS configuration(VILC) is 0 V min and 20% Vcc max; (5): input signal transition time(TIN) is 250 ns max.