X68C75

Features: • Highly Integrated Microcontroller Peripheral -8K x 8 E2 Memory -2 x 8 General Purpose Bidirectional I/O Ports -16 x 8 General Purpose Registers -Integerated Interrupt Controller Module -Internal Programmable Address Decoding• Self Loading Integrated Code (SLIC) -On-Chip BIO...

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SeekIC No. : 004547374 Detail

X68C75: Features: • Highly Integrated Microcontroller Peripheral -8K x 8 E2 Memory -2 x 8 General Purpose Bidirectional I/O Ports -16 x 8 General Purpose Registers -Integerated Interrupt Controller Mo...

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Part Number:
X68C75
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• Highly Integrated Microcontroller Peripheral
   -8K x 8 E2 Memory
   -2 x 8 General Purpose Bidirectional I/O Ports
   -16 x 8 General Purpose Registers
   -Integerated Interrupt Controller Module
   -Internal Programmable Address Decoding
• Self Loading Integrated Code (SLIC)
   -On-Chip BIOS and Boot Loader
   -IBM/PC Based Interface Software(XSLIC)
• Concurrent Read During Write
   -Dual Plane Architecture
• Isolates Read/Write Functions Between Planes
• Allows Continuous Execution Of Code From One Plane While Writing In The Other Plane
• Multiplexed Address/Data Bus
   -Direct Interface to Popular 68HC11 Family of Microcontrollers
• Software Data Protection
   -Protect Entire Array During Power-up/-down
• Block Lock™ Data Protection
   -Set Write Lockout in 1K Blocks
• Toggle Bit Polling
• High Performance CMOS
   -Fast Access Time, 120ns
   -Low Power
• 60mA Active
• 100A Standby
• PDIP, PLCC, and TQFP Packaging Available



Application

This section gives examples of most widely used embedded systems architectures using the X68C75 and 68HC11 microcontroller. However, keep in mind that other microcontrollers are also supported by the X68C75 and/or other SLIC devices that Xicor manufactures.

Example 1
In this system, the X68C75 is the only parallel device residing on the multiplexed address and data bus. There may be other peripherals on the system board which are controlled by the ports on the X68C75. This configuration maps the EEM to a memory address in the range of E000-FFFFH. The SFRM can be mapped to any of the 64 x 1K pages within the memory space.

Example 2
Applications requiring more than 8K bytes of program memory space can be implemented using the basic system architecture depicted in example 1 along with an additional memory device such as the X28C256. Since this device requires non-multiplexed address/data buses,the X68C75 LAM feature is used to output the low order address byte. The SFRM can be mapped to any 64x1K page, but the X28C256 should be mapped to the low memory address space and out of the E2M address range (E000-FFFFH). This technique may also be used for other external byte wide memories such as SRAMs or EPROMs.




Pinout

  Connection Diagram


Specifications

Temperature under Bias .................. 65°C to +135°C
Storage Temperature ....................... 65°C to +150°C
Voltage on any Pin with
           Respect to VSS .................................. 1V to +7V
D.C. Output Current ...................................................5mA
Lead Temperature
         (Soldering, 10 seconds) .............................. 300°C



Description

The X68C75 is a highly integrated peripheral for the 68HC11 family of microcontrollers. The X68C75 integrates 8K-bytes of 5V byte-alterable nonvolatile memory,2 bidirectional 8-bit ports, 16 general purpose registers,programmable internal address decoding and a multiplexed address and data bus.

The 5V byte-alterable nonvolatile memory of X68C75 can be used as program storage, data storage, or a combination of both. The memory array is separated into two 4K-byte sections which allows read accesses to one section while a write operation is taking place in the other section. The nonvolatile memory also features Software Data Protection to protect the contents during power transitions, and an advanced Block Protect register which allows individual blocks of the memory to be configured as read-only or read/write.




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