WED9LAPC3C16V8BC

Features: Clock speeds:• SSRAM: 100 MHz• SDRAM: 100 MHz 100% tested to timing requirements of LUCTAPC640's memory interface Packaging:• 192 pin BGA, 21mm x 21mm 3.3V Operating supply voltage Direct control interface to both the CRAM and VCRAM ports on the LUCTAPC640 62% space sav...

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SeekIC No. : 004545605 Detail

WED9LAPC3C16V8BC: Features: Clock speeds:• SSRAM: 100 MHz• SDRAM: 100 MHz 100% tested to timing requirements of LUCTAPC640's memory interface Packaging:• 192 pin BGA, 21mm x 21mm 3.3V Operating supp...

floor Price/Ceiling Price

Part Number:
WED9LAPC3C16V8BC
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

 Clock speeds:
• SSRAM: 100 MHz
• SDRAM: 100 MHz
100% tested to timing requirements of LUCTAPC640's memory interface
Packaging:
• 192 pin BGA, 21mm x 21mm
3.3V Operating supply voltage
Direct control interface to both the CRAM and VCRAM ports on the LUCTAPC640
62% space savings vs. monolithic solution
Reduced system inductance and capacitance



Specifications

Voltage on VCC Relative to VSS -0.5V to +4.6V
Vin (DQx) -0.5V to Vcc +0.5V
Storage Temperature (BGA) -55 to +125
Junction Temperature +125
Short Circuit Output Current 50 mA

* Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in operational sections of this specifi cations is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.




Description

The WED9LAPC3C16V8BC is a 3.3V, 512K x 32 Synchronous Pipeline SRAM and a 1M x 64 Synchronous DRAM array packaged in a 21mm x 21mm 192 lead BGA.

The WED9LAPC3C16V8BC provides the memory required for the CRAM (Control Memory) and VCRAM (Virtual Connection Memory) memory ports for Lucent's LUCTAPC640 ATM port controller. When used in conjunction with the WED9LAPC2B16P8BC, which provides memory for the BRAM (Buffer Memory) and PRAM (Pointer Memory) memory ports, the entire memory requirement of the L CTAPC640 can be met using these 2 BGA devices. The WED9LAPC3C16V8BC facilitates the addition of an external Synchronous SRAM, effectively doubling the SRAM array by adding a chip select/de-select function (SSCE#).

The WED9LAPC3C16V8BC is 100% tested to the timing requirements of the LUCTAPC640's memory interface timing for both Commercial and Industrial temperatureranges.




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