WED2ZL362MSJ

The WEDC SyncBurst - SRAM family of  the WED2ZL362MSJ employs high-speed, low-power CMOS designs that are fabricated using an advanced CMOS process. WEDOs 72Mb SyncBurst SRAMs integrate two ZM x 18 SRAMs into a single BGA package to provide a 2M x 36 configuration. All synchronous inputs pass through registers controlled by a positive-edge-triggered single-clock input. The NBL or No Bus Latency Memory utilizes all the bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except output enable and linear burst order are synchronized to input clock. Burst order control must be tied "High or Low." Asynchronous inputs include the sleep mode enable (ZZ) and Output Enable Write cycles are internally self-timed and initiated by the rising edge of the clock input. This feature eliminates complex off-chip write pulse generation and provides increased timing flexibility for incoming signals.

The features of WED2ZL362MSJ are fast clock speed: 225, 200, 166 and 150MHz,  fast access times: 2.8, 3.0, 3.5 and 3.8ns, Fastg access times: 2.8, 3.0, 3.5 and 3.8ns, separate core and I/O power supply, snooze mode for reduced-standby power , individual byte write control, clock-controlled and registered addresses, data I/Os and control signals, burst control (interleaved or linear burst), packaging: 119-bump BGA package, JEDEC Pin definition, low capacitive bus loading. The WED2ZL362MSJ is an NBL SSRAM designed to sustain 100% bus bandwidth by eliminating turnaround cycle when there is transition from Reagz me, or vice versa. All inputs (with the exception of OE, LBO and ZZ) are synchronized to rising clock edges.

The absolute maximum ratings of WED2ZL362MSJ are voltage on VDD Supply Relative to Vss(-0.3V to +3.6V), VIN(DQx)(-0.3V to +3.6V), VIN(Inputs)(-0.3V to +3.6V), storage temerature(BGA)to -55 to+125, short circuit out ut current(100mA).(stress greater than those listed under "absolute maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating condtions for extended periods may affect reliability.