WED2EG472512V

The WED2EG472512V is a Synchronous/Synchronous Burst SRAM, 84 position Dual Key; Double High DIMM (168 contacts) Module, organized as 4x512Kx72. The Module contains sixteen (16) Synchronous Burst RAM devices, packaged in the industry standard JEDEC 14mmx20mm TQFP placed on a Multilayer FR4 Substrate. The Module Architecture is defi ned as a Sync/SyncBurst, Pipeline, with support for either linear or sequential burst. This Module provides high performance, 3-1-1-1 accesses when used in Burst Mode.

Synchronous Only operations of the WED2EG472512V are performed via strapping ADSC# Low, and ADSP#/ADV# High, which provides for Ultra Fast Accesses in Read Mode while providing for internally self-timed Early Writes.

Synchronous/Synchronous Burst operations of the WED2EG472512V are in relation to an externally supplied clock, Registered Address, Registered Global Write, egistered Enables as well as an Asynchronous Output Enable. This module has been defi ned with full fl exibility, which allowes individual control of each of the eight bytes, as well as Quad Words in both Read and Write Operations.