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W3EG72128S-JD3

Features: · Double-data rate architecture· DDR200, DDR266, DDR333 and DDR400 • JEDEC design specifi cations· BI-directional data strobes (DQS)· Differential clock inputs (CK & CK#)· Programmable Read Latency 2,2.5 (clock)· Programmable Burst Length (2,4,8)· Programmable Burst type (seque...

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SeekIC No. : 004544718 Detail

W3EG72128S-JD3: Features: · Double-data rate architecture· DDR200, DDR266, DDR333 and DDR400 • JEDEC design specifi cations· BI-directional data strobes (DQS)· Differential clock inputs (CK & CK#)· Progra...

W3EG72128S-JD3 Data Sheet

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Part Number:
W3EG72128S-JD3
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/22

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Product Details

Description



Features:

· Double-data rate architecture
· DDR200, DDR266, DDR333 and DDR400
    • JEDEC design specifi cations
· BI-directional data strobes (DQS)
· Differential clock inputs (CK & CK#)
· Programmable Read Latency 2,2.5 (clock)
· Programmable Burst Length (2,4,8)
· Programmable Burst type (sequential & interleave)
· Edge aligned data output, center aligned data input.
· Auto and self refresh
· Serial presence detect
· Dual Rank
· Power supply:
    • VCC = VCCQ = +2.5V ± 0.20V (100, 133, 166MHz)
    • VCC = VCCQ = +2.6V ± 0.10V (200MHz)
· JEDEC Standard 184 pin DIMM package
    • PCB height: 30.48 (1.20")


Specifications

Parameter
Symbol
Ratings
Unit
Voltage on any pin relative to VSS
VIN, VOUT
-0.5 to 3.6
V
Voltage on VCC supply relative to VSS
VCC, VCCQ
-1.0 to 3.6
V
Storage Temperature
TSTG
-55 to +150
°C
Power Dissipation
PD
18
W
Short Circuit Current
IOS
50
mA



Description

The W3EG72128S is a 2x64Mx72 Double data Rate SDRAM memory module based on 512Mb DDR SDRAM components. The module consists of eighteen 64Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin FR4 substrate.

Synchronous design allows precisse cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.




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