Features: DDR266 and DDR333 Double-data-rate architecture Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2.5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data output, center ali...
W3EG6433S-D3: Features: DDR266 and DDR333 Double-data-rate architecture Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2.5 (clock) Programmable Burst Lengt...
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Features: • Double-data-rate architecture• DDR200, DDR266, DDR333 and DDR400• JE...
Features: • Double-data-rate architecture• DDR200, DDR266, DDR333 and DDR400• JE...
Features: • Double-data-rate architecture• DDR200, DDR266, DDR333 and DDR400• JE...
Parameter | Symbol | Value | Units |
Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature |
VIN, VOUT VCC, VCCQ TSTG |
-0.5 to 3.6 -1.0 to 3.6 -55 to +150 |
V V |
Power Dissipation Short Circuit Current |
PD IOS |
24 50 |
W mA |
Note: Permanent device damage may occur if 'ABSOLUTE MAXIMUM RATINGS' are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability
The W3EG6433S is a 2x16Mx64 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM component. The module consists of sixteen 16Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin FR4 substrate.
Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.