Features: ·Double-data-rate architecture·DDR266, DDR333, and DDR400·Bi-directional data strobes (DQS)·Phase-lock loop (PLL) clock driver to reduce loading·Differential clock inputs (CK & CK#)·ECC error detection and correction·Programmable Read Latency 2, 2.5 (clock)·Programmable Burst Length ...
W3EG2128M72AFSR-D3: Features: ·Double-data-rate architecture·DDR266, DDR333, and DDR400·Bi-directional data strobes (DQS)·Phase-lock loop (PLL) clock driver to reduce loading·Differential clock inputs (CK & CK#)·EC...
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Features: • Double-data-rate architecture• DDR200, DDR266, DDR333 and DDR400• JE...
Features: • Double-data-rate architecture• DDR200, DDR266, DDR333 and DDR400• JE...
Features: • Double-data-rate architecture• DDR200, DDR266, DDR333 and DDR400• JE...
Parameter | Symbol | Value | Units |
Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature |
VIN, VOUT VCC, VCCQ TSTG |
-0.5 - 3.6 -1.0 - 3.6 -55 - +150 |
V V |
Power Dissipation Short Circuit Current |
PD I0S |
27 50 |
W mA |
Note:
• Permanent device damage may occur if 'ABSOLUTE MAXIMUM RATINGS' are exceeded.
• Functional operation should be restricted to recommended operating condition.
• Exposure to higher than recommended voltage for extended periods of time could affect device reliability
The W3EG2128M72AFSR is a 2x128Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM components. The module consists of thirtysix 128Mx4 components, in FBGA packages mounted on a 184 pin FR4 substrate.
Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.