W28F641B

Features: − One hundred and twenty-seven 32k-word Main Blocks• 64M Density with 16Bit I/O Interface• High-Performance Reads− Top or Bottom Parameter Location− 80/35 nS 8-Word Page Mode• Enhanced Data Protection Features• Configurative 4-Plane Dual WorkW...

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W28F641B Picture
SeekIC No. : 004544562 Detail

W28F641B: Features: − One hundred and twenty-seven 32k-word Main Blocks• 64M Density with 16Bit I/O Interface• High-Performance Reads− Top or Bottom Parameter Location− 80/35 nS ...

floor Price/Ceiling Price

Part Number:
W28F641B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/20

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Product Details

Description



Features:

− One hundred and twenty-seven 32k-word Main Blocks
• 64M Density with 16Bit I/O Interface
• High-Performance Reads
− Top or Bottom Parameter Location
− 80/35 nS 8-Word Page Mode
• Enhanced Data Protection Features
• Configurative 4-Plane Dual Work
− Individual Block Lock and Block Lock-Down with Zero-Latency
− Flexible Partitioning
− Read operations during Block Erase or (Page Buffer) Program
− All blocks are locked at power-up or device reset
− Status Register for Each Partition
− Absolute Protection with VPP VPPLK
• Low Power Operation
− Block Erase, Full Chip Erase, (Page Buffer) Word Program Lockout during Power Transitions
− 2.7V Read and Write Operations
− VDDQ for Input/Output Power Supply Isolation
− Automatic Power Savings Mode Reduces ICCR in Static Mode
• Automated Erase/Program Algorithms
− 3.0V Low-Power 11 S/ Word (Typ.) Programming
• Enhanced Code + Data Storage
− 5 S Typical Erase/Program Suspends
− 12V No Glue Logic 9 S/ Word (Typ.) Production Programming and 0.5s Erase (Typ.)
• OTP (One Time Program) Block
− 4-Word Factory-Programmed Area
− 4-Word User-Programmable Area
• Cross-Compatible Command Support
• High Performance Program with Page Buffer
− Common Flash Interface (CFI)
− Basic Command Set
− 16-Word Page Buffer
− 5 S/ Word (Typ.) at 12V VPP
• Extended Cycling Capability
• Operating Temperature
− Minimum 100,000 Block Erase Cycles
− -40°C to +85°C
• Chip-Size Packaging
• CMOS Process (P-type silicon substrate)
− 0.75 mm pitch 48-Ball TFBGA and 48-Pin TSOP
• Flexible Blocking Architecture
• ETOX™ Flash Technology
− Eight 4k-word Parameter Blocks -
• No designed or rated as radiation hardened
* ETOX is a trademark of Intel Corporation.



Pinout

  Connection Diagram


Specifications

Operating Temperature During Read, Erase and Program................................................... -40°C to +85°C(1)
Storage Temperature During under Bias ................................................................................ -40°C to +85°C
During non Bias ................................................................................................................... -65°C to +125°C
Voltage On Any Pin (except VDD and VPP) ...................................................................... -0.5V to VDD +0.5V(2)
VDD and VDDQ Supply Voltage............................................................................................... -0.2V to +3.9V(2)
VPP Supply Voltage........................................................................................................ -0.2V to +12.6V(2,3,4)
Output Short Circuit Current..............................................................................................................100 mA(5)
*WARNING: Stressing the device beyond the "Absolute Maximum Ratings" may cause permanent damage. These are stress ratings only. Operation beyond the "Operating Conditions" is not recommended and extended exposure beyond the "Operating Conditions" may affect device reliability.
Notes:
1. Operating temperature is for extended temperature product defined by this specification.
2. All specified voltages are with respect to VSS. Minimum DC voltage is -0.5V on input/output pins and -0.2V on VDD and VPP pins. During transitions, this level may undershoot to -2.0V for periods <20 nS. Maximum DC voltage on input/output pins is VDD +0.5V, which, during transitions, may overshoot to VDD +2.0V for periods <20 nS.
3. Maximum DC voltage on VPP may overshoot to +13.0V for periods <20 nS.
4. VPP erase/program voltage is normally 2.7V to 3.6V. Applying 11.7V to 12.3V to VPP during erase/program can be done for a maximum of 1,000 cycles on the main blocks and 1,000 cycles on the parameter blocks. VPP may be connected to 11.7V to 12.3V for a total of 80 hours maximum.
5. Output shorted for no more than one second. No more than one output shorted at a time.



Description

The W28F641, a 4-Plane Page Mode Dual Work (Simultaneous Read while Erase/Program) Flash memory, is a low power, high density, low cost, nonvolatile read/write storage solution for a wide range of applications. The product can be operated at VDD = 2.7V to 3.6V and VPP = 1.65V to 3.6V or 11.7V to 12.3V. Its low voltage operation capability greatly extends battery life for portable applications.
The W28F641 provides high performance asynchronous page mode. It allows code execution directly from Flash, thus eliminating time-consuming wait states. Furthermore, the configurative partitioning architecture allows flexible dual work operation.

The memory array block architecture utilizes Enhanced Data Protection features, and provides separate Parameter and Main Blocks that provide maximum flexibility for safe nonvolatile code and data storage.

Fast program capability is provided through the use of high speed Page Buffer Program. Special OTP (One Time Program) block provides an area to store permanent code such as a unique number.




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