Features: · 16/32/64/128/256 QAM demodulator (DVB-C compatible : ETS 300-429).· On chip 9-bit ADC.· On chip PLL for crystal frequency multiplication.· Digital down conversion.· Half Nyquist filters (roll off = 15 %).· Automatic gain control PWM output (AGC).· Symbol timing recovery, with programma...
VES1820X: Features: · 16/32/64/128/256 QAM demodulator (DVB-C compatible : ETS 300-429).· On chip 9-bit ADC.· On chip PLL for crystal frequency multiplication.· Digital down conversion.· Half Nyquist filters ...
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Parameter |
Min | Max | Unit. |
Ambient operating temperature : Ta | 0 | 70 | |
DC supply voltageltage | -0.5 | + 4.1 | V |
DC Input voltage | -0.5 | VDD + 0.5 | V |
DC Input Current | ± 20 | mA | |
Lead Temperature | ±300 | ||
Junction Temperature | ±150 |
Stresses above the absolute maximum ratings may cause permanent damage to the device. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability.
The VES1820X is a single chip channel receiver for 16, 32, 64, 128 and 256-QAM modulated signals. The device interfaces directly to the IF signal, which is sampled by a 9-bit AD converter.
The VES1820X performs the clock and the carrier recovery functions. The digital loop filters for both clock and carrier recovery are programmable in order to optimize their characteristics according to the current application.
After base band conversion, equalization filters are used for echo cancellation in cable applications. These filters are configured as Tspaced transversal equalizer or DFE equalizer, so that the system performance can be optimized according to the network characteristics. A proprietary equalization algorithm, independent of carrier offset, is achieved in order to assist carrier recovery. Then a decision directed algorithm takes place, to achieve final equalization convergence.The VES1820X implements a FORNEY convolutional deinterleaver of depth 12 blocks and a Reed-Solomon decoder which corrects up to 8 erroneous bytes. The deinterleaver and the RS decoder are automatically synchronized thanks to the frame synchronization algorithm which uses the MPEG2 sync byte. Finally descrambling according to DVB-C standard, is achieved at the Reed Solomon output. This device is controlled via an I2C bus.
Designed in 0.35 m CMOS technology and housed in a 100 pin MQFP package, the VES1820X operates over the commercial temperature range.