Features: High-speed: 10, 12, 15 ns Low Power Dissipation: CMOS Standby: 0.5 mA (Max.) Fully static operationAll inputs and outputs directly compatible Three state outputsUltra low data retention current (VCC = 2V) Single 5V ± 10% Power Supply Packages 28-pin TSOP (Standard) 28-pin 300 mil SOJPin...
V61C518256: Features: High-speed: 10, 12, 15 ns Low Power Dissipation: CMOS Standby: 0.5 mA (Max.) Fully static operationAll inputs and outputs directly compatible Three state outputsUltra low data retention c...
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Features: High-speed: 10, 12, 15 ns All inputs and outputs directly TTL compatible Three state out...
Features: High-speed: 10, 12, 15 ns Fully static operation All inputs and outputs directly TTL c...
Features: High-speed: 10, 12, 15 nsAll inputs and outputs directly TTL compatibleThree state outp...
Symbol |
Parameter |
Commercial |
Units |
VCC |
Supply Voltage |
-0.5 to +7 |
V |
VN |
Input Voltage |
-0.5 to +7 |
V |
VDQ |
Input/Output Voltage Applied |
VCC + 0.5 |
V |
TBIAS |
Temperature Under Bias |
-55 to +85 |
°C |
TSTG |
Storage Temperature |
-55 to +125 |
°C |
The V61C518256 is a 262,144-bit static random access memory organized as 32,768 words by 8 bits. It is built with MOSEL VITELIC's high performance CMOS process. Inputs and threestate outputs are TTL compatible and allow for direct interfacing with common system bus structures.