UT8Q1024K8

Features:

25ns maximum (3.3 volt supply) address access time 
Dual cavity package contains two (2) 512K x 8 industry- standard asynchronous SRAMs; the control architecture
allows operation as an 8-bit data width 
TTL compatible inputs and output levels, three-state bidirectional data bus
Typical radiation performance
   - Total dose: 50krad(Si)
   - SEL Immune >80 MeV-cm ²/mg

   - LET_TH(0.25) = >10 MeV-cm² /mg
   - Saturated Cross Section cm² per bit, 5.0E-9
   - E-8 errors/bit-day, Adams 90% geosynchronous heavy ion 
Packaging options:
  - 44-lead bottom brazed dual CFP (BBTFP) (4.6 grams)
Standard Microcircuit Drawing 5962-01532
  - QML T and Q compliant part


Pinout




Specifications

SYMBOL	PARAMETER	LIMITS
VDD	DC supply voltage	-0.5 to 4.6V
VI/O	Voltage on any pin	-0.5 to 4.6V
TSTG	Storage temperature	-65 to +150C
PD	Maximum power dissipation	1.0W (per byte)
TJ	Maximum junction temperature2	+150
JC	Thermal resistance, junction-to-case3	10/W
II	DC input current	±10 mA

Description

The QCOTS^TMUT8Q1024K8 Quantified Commercial Off-the-Shelf product is a high-performance 1M byte (8Mbit) CMOS
static RAM built with two individual 524,288 x 8 bit SRAMs with a common output enable. Memory access and control is provided by an active LOW chip enable (En), an active LOW output enable (G). This device has a power-down feature that reduces power consumption by more than 90% when deselected.

Writing to each memory is accomplished by taking one of the chip enable (E_n) inputs LOW and write enable (W_n)inputs LOW. Data on the I/O pins is then written into the location specified on the address pins (A₀ through A₁₈ ). Reading from the UT8Q1024K8 is accomplished by taking one of the chip enable (Eand output enable (G) LOW while forcing write enable (W_n) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. Only one SRAM can be read or written at a time.

The input/output pins of UT8Q1024K8 are placed in a high impedance state when the device is deselected (E_n HIGH), the outputs are disabled (G HIGH), or during a write operation (E_n LOW and Wn LOW).