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USBN9602

Features: `Full-Speed USB Node Device`USB transceiver`3.3V signal voltage regulator`48 MHz oscillator circuit`Programmable clock generator`Serial Interface Engine consisting of Physical Layer Interface (PHY) and Media Access Controller (MAC), USB Specificatio`1.0 compliant`Control/Status Register ...

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SeekIC No. : 004538832 Detail

USBN9602: Features: `Full-Speed USB Node Device`USB transceiver`3.3V signal voltage regulator`48 MHz oscillator circuit`Programmable clock generator`Serial Interface Engine consisting of Physical Layer Interf...

USBN9602 Data Sheet

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Part Number:
USBN9602
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/7

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Product Details

Description



Features:

`Full-Speed USB Node Device
`USB transceiver
`3.3V signal voltage regulator
`48 MHz oscillator circuit
`Programmable clock generator
`Serial Interface Engine consisting of Physical Layer Interface (PHY) and Media Access Controller (MAC), USB Specificatio`1.0 compliant
`Control/Status Register File
`USB Functio`Controller with seve`FIFO-based Endpoints:
One bidirectional Control Endpoint 0 (8 bytes)
Three Transmit Endpoints (2*32 and 1*64 bytes)
Three Receive Endpoints (2*32 and 1*64 bytes)
`8-bit parallel interface with two selectable modes:
non-multiplexed
multiplexed (Intel compatible)
`DMA support for parallel interface
`MICROWIRE/PLUS™ Interface
`28-pi`SO package


Pinout

Connection Diagram


Specifications

Supply Voltage..............  -0.5V to +7.0V
DC Input Voltage .......... -0.5V to Vcc +0.5V
DC Output Voltage ........   -0.5V to Vcc +0.5V
Storage Temperature ........ -65°C to +150°C
Lead Temperature (Soldering 10 seconds) ..260°C
ESD Rating...................... 12 kV
1. Human body model; 100pF discharged through a 1.5 kW resistor.



Description

The USBN9602 is an integrated USB Node controller compatible with the USB Specification Versions 1.0 and 1.1. Integrated onto a single IC are the required USB transceiver with a 3.3V Regulator, Media Access Controller, USB endpoint (EP) FIFOs, a versatile 8-bit parallel interface, MICROWIRE/PLUS™ Interface and a clock generator.

A total of seven FIFO buffers of the USBN9602 support the different USB messages: one bidirectional FIFO for the mandatory con-trol endpoint EP0 and six FIFOs for an additional six unidirectional Endpoint Pipes to support USB interrupt, bulk and isochronous data transfers. The 8-bit parallel interface supports multiplexed and non-multiplexed style CPU address/data buses. A programmable interrupt output scheme allows device configuration for different interrupt signaling requirements.




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