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USB3319

Features: •USB-IF Hi-Speed compliant to the Universal Serial Bus Specification Rev 2.0•Interface compliant with the ULPI Specification revision 1.1 as a Single Data Rate (SDR) PHY•1.8V IO Voltage (+/- 10%)•SMSC flexPWRTM Technology- Low current design ideal for battery po...

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SeekIC No. : 004538802 Detail

USB3319: Features: •USB-IF Hi-Speed compliant to the Universal Serial Bus Specification Rev 2.0•Interface compliant with the ULPI Specification revision 1.1 as a Single Data Rate (SDR) PHY̶...

USB3319 Data Sheet

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Part Number:
USB3319
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

•USB-IF "Hi-Speed" compliant to the Universal Serial Bus Specification Rev 2.0
•Interface compliant with the ULPI Specification revision 1.1 as a Single Data Rate (SDR) PHY
•1.8V IO Voltage (+/- 10%)
•SMSC flexPWRTM Technology
- Low current design ideal for battery powered applications
- "Sleep" mode tri-states all ULPI pins and places the part in a low current state
•Supports FS pre-amble for FS hubs with a LS device attached (UTMI+ Level 3)
•Supports HS SOF and LS keep-alive pulse
•Includes full support for the optional On-The-Go (OTG) protocol detailed in the On-The-Go Supplement Revision 1.0a specification
•Supports the OTG Host Negotiation Protocol (HNP) and Session Request Protocol (SRP)
•Allows host to turn VBUS off to conserve battery power in OTG applications
•Support OTG monitoring of VBUS levels with internal comparators
•"Wrapper-less" design for optimal timing performance and design ease
- Low Latency Hi-Speed Receiver (43 Hi-Speed clocks Max) allows use of legacy UTMI Links with a ULPI bridge
•Internal 5V cable short-circuit protection of ID, DP and DM lines to VBUS or ground
•13MHz Reference Clock operation
- 0 to 3.6V input drive tolerant
- Able to accept "noisy" clock sources
•Internal low jitter PLL for 480MHz Hi-Speed USB operation
•Internal detection of the value of resistance to ground on the ID pin
•Integrated battery to 3.3V LDO regulator
- 2.2uF bypass capacitor
- 100mV dropout voltage
•Integrated ESD protection circuits
- Up to +-15kV without any external devices
•Carkit UART mode for non-USB serial data transfers
•Integrated USB Switch
- Allows single USB port of connection
- High speed data
- Battery charging
- Stereo and mono/mic audio
- USB1.1 data
•Industrial Operating Temperature -40 to +85
•Packaging Options
- 24 pin QFN lead-free RoHS compliant package (4 x 4 x 0.90 mm height)
- 25 ball VFBGA lead-free RoHS compliant package also available; (3 x 3 x 0.88mm height)


Application

The USB3319 is targeted for any application where a Hi- Speed USB connection is desired and when board space, power, and interface pins must be minimized.

The USB3319 is well suited for:
•Cell Phones
•PDAs
•MP3 Players
•GPS Personal Navigation
•Scanners
•External Hard Drives
•Digital Still and Video Cameras
•Portable Media Players
•Entertainment Devices
•Printers
•Set Top Boxes
•Video Record/Playback Systems
•IP and Video Phones
•Gaming Consoles
•POS Terminals


Pinout

Connection Diagram


Description

The USB3319 is a highly integrated Hi-Speed USB 2.0 Transceiver (PHY) that supports systems architectures based on a 13MHz reference clock. It is designed to be used in both commercial and industrial temperature applications.

The USB3319 meets all of the electrical requirements to be used as a Hi-Speed USB Host, Device, or an On-the-Go (OTG) device. In addition to the supporting USB signaling the USB3319 also provides USB UART mode and USB Audio mode.

USB3319 uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the Link. The industry standard ULPI interface uses a method of in-band signaling and status byte transfers between the Link and PHY, to facilitate a USB session. By using in-band signaling and status byte transfers the ULPI interface requires only 12 pins.

The USB3319 uses SMSC's "wrapper-less" technology to implement the ULPI interface. This "wrapperless" technology allows the PHY to achieve a low latency transmit and receive time. SMSC's low latency transceiver allows an existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By adding a bridge to the ASIC the existing and proven UTMI Link IP can be reused.




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