UCC5696

· Meets Ultra2 (SPI-2 LVD SCSI), Ultra3, Ultra 60 (SPI-3), Ultra320 (SPI-4), and Ultra640 SPI-5) Standards and Considers Options hrough SPI-10
· 2.7-V to 5.25-V Termpwr Operation
· Differential Fail-Safe Bias
· I²C Bus Adjustable Impedance and ifferential Bias Current
· 80-Pin Low Profile QFP

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and unctional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not mplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

‡ All voltage are with respect to ground. Currents are positive into, negative out of the specified terminal.

The UCC5696 is a 27-line LVD only SCSI rogrammable terminator. The nominal settings n power up are compliant to SPI2 through PI4. The programmable settings are used for PI5 and beyond. The UCC5696 uses the I²C to rogram the differential impedance and the ifferential bias current. The differential mpedance is programmed in 5- increments rom 55 to 135 using 4 bits (16 steps). The ifferential bias current is programmed in 50 A rom 0.7 mA to 1.45 mA using 4 bits (16 steps).

The UCC5696 has the SPI3 mode change delay, he typical value is 200 ms.