U631H256XS

The U631H256XS has two separate modes of operation: SRAM mode and nonvolatile mode. In SRAM mode, the memory operates as an ordinary static RAM. In nonvolatile operation, data is transferred in parallel from SRAM to EEPROM or from EEPROM to SRAM. In this mode SRAM functions of U631H256XS are disabled.

The U631H256XS is a fast static RAM (25, 35, 45 ns), with a nonvolatile electrically erasable PROM (EEPROM) element incorporated in each static memory cell. The SRAM U631H256XS can be read and written an unlimited number of times, while independent nonvolatile data resides in EEPROM. Data transfers from the SRAM to the EEPROM (the STORE operation), or from the EEPROM to the SRAM (the RECALL operation) are initiated through software sequences.

The U631H256XS combines the high performance and ease of use of a fast SRAM with nonvolatile data integrity.

Once a STORE cycle U631H256XS is initiated, further input or output are disabled until the cycle is completed.

Because a sequence of addresses is used for STORE U631H256XS initiation, it is important that no other read or write accesses intervene in the sequence or the sequence will be aborted.

Internally, RECALL U631H256XS is a two step procedure. First, the SRAM data is cleared and second, the nonvolatile nformation is transferred into the SRAM cells.

The RECALL U631H256XS operation in no way alters the data in the EEPROM cells. The nonvolatile data can be recalled an unlimited number of times.

The chips are tested with a restricted wafer probe program at room temperature only. Untested parameters are marked with a number sign (#).