U6264A

8192 x 8 bit static CMOS RAM
70 and 100 ns Access Times
Common data inputs and outputs
Three-state outputs
Typ. operating supply current
    70 ns: 45 mA
    100 ns: 37 mA
Data retention current at 3 V: < 10  µA (standard)
Standby current standard < 30 µA
Standby current low power  (L) < 10 µA
Standby current very low power (LL) < 1 µA
Standby current for LL-version at 25 °C and 5 V: typ. 50 nA
TTL/CMOS-compatible
Automatic reduction of power  dissipation in long Read or Write  cycles
Power supply voltage 5 V
Operating temperature ranges:
    0 to 70 °C
    -25 to 85 °C
    -40 to 85 °C
Quality assessment according to CECC 90000, CECC 90100 and CECC 90111

The U6264A is a static RAM manufactured  using a CMOS process technology with  the following operating modes:
        - Read  - Standby
        - Write  - Data Retention
The memory array of U6264A is based on a  6-transistor cell. Data  retention  is guaranteed down to 2 V. With the exception of E2, all inputs consist of NOR gates, so that no  pull-up/pull-down  resistors are required. This gate circuit allows  to achieve low power standby requirements by activation with TTL-levels too. If the U6264A is inactivated by  E2  =  L,  the  standby  current  (TTL) drops to 150 µA typ.