TSC80C51

Features:

Power control modes
128 bytes of RAM
4 K bytes of ROM (TSC80C31/80C51)
32 programmable I/O lines
Two 16 bit timer/counter
64 K program memory space
64 K data memory space
Fully static design
0.8 µm CMOS process
Boolean processor
5 interrupt sources
Programmable serial port
Temperature range : commercial, industrial, automotive and military 


Specifications

Ambiant Temperature Under Bias :
C = commercial . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . 0°C to 70°C
I = industrial . . . . . . . . . . . . . . . . . . . . . . . . . . .. .  40°C to 85°C
Storage Temperature . . . . . . . . . . . . . . . . .  . . 65°C to + 150°C
Voltage on VCC to VSS . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to + 7
Voltage on Any Pin to VSS . . . . . . . . . . . . .  . 0.5 V to VCC + 0.5 V
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W**

Description

The TSC80C31/TSC80C51 is high performance SCMOS versions of the 8051 NMOS single chip 8 bit µC. 

The fully static  design of the TSC80C31/TSC80C51 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of  data.

The TSC80C31/TSC80C51 retains all the features of the 8051: 4 K bytes of ROM ; 128 bytes of RAM ; 32 I/O lines ;two 16 bit timers ; a 5-source, 2-level inte-rrupt structure ; a full duplex serial port ; and on-chip oscillator and clock circuits.In addition, the TSC80C31/80C51 has two  software-selectable modes of reduced activity for further eduction in power consumption. In the Idle Mode the CPU is frozen while the RAM, the timers, the serial port,and the interrupt system continue to function. In the Power Down Mode the RAM is saved and all other functions are inoperative.


The TSC80C31/TSC80C51 is manufactured using SCMOS process which allows them to run from 0 up to 44 MHz with VCC = 5 V. The TSC80C31/80C51 is also available at 20 MHz with 2.7 V < Vcc < 5.5 V.