Features: • Byte-wide Multiplexing, Demultiplexing, Framing, and PLL (MDFP) in one device• Choice of STS-12/STM-4 or STS-3/STM-1 transmission rates• Configurable master or slave reference clock generation and PLL bypass for external clocking• 77.76 MHz or 19.44 MHz output f...
TQ8101C: Features: • Byte-wide Multiplexing, Demultiplexing, Framing, and PLL (MDFP) in one device• Choice of STS-12/STM-4 or STS-3/STM-1 transmission rates• Configurable master or slave re...
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Parameter | Symbol | Minimum | Nominal | Maximum | Unit |
Positive supply | VCC | - | 0 | 7 | V |
Negative supply | VEE | - | -7 | 0 | V |
Output voltage | VO | ECL | VEE 0.5 | +0.5 | V |
Output current | IO | ECL | - | 40 | mA |
Input voltage | VI | ECL | VEE 0.5 | +0.5 | V |
Input current | II | ECL | -1 | 1 | mA |
Output voltage | VO | TTL | -0.5 | VCC + 0.5 | V |
Output current | IO | TTL | - | 20 | mA |
Input voltage | VI | TTL | 0.5 | VCC + 0.5 | V |
Input current | II | TTL | -1 | 1 | mA |
Junction temperature | TJ | - | -55 | +150 | ° C |
Storage temperature | TS | - | -65 | +175 | ° C |
The TQ8101C is a SONET/SDH transceiver that integrates Multiplexing, Demultiplexing, SONET/SDH Framing, clock synthesis PLL (MDFP), and loopback functions in a single monolithic integrated circuit. Implementation with the TQ8101C requires only a simple external RC loop filter and standard TTL and ECL power supplies. For optimal performance, the TQ8101C MDFP is packaged in a 68-pin multilayer ceramic (MLC) surface-mount package with an integral CuW heat spreader. The TQ8101C provides an integrated solution for physical interfaces intended for use in STS-12/STM-4 (622.08-Mb/s) and STS-3/STM-1 (155.52-Mb/s) SONET/SDH systems.
The TQ8101C meets ANSI, Bellcore, and ITU requirements for a SONET/ SDH device. With a 51.84-MHz reference clock, the phase-locked loop (PLL) provides 77.76-MHz or 19.44-MHz output for the multiplexer and 77.76-MHz or 19.44-MHz and 51.84-MHz output for the demultiplexer.