Features: `Low rDS(on) . . . 65 mW Typ at VGS = 4.5 V
` High Current Capability 6 A at VGS = 4.5 V
` Logic-Level Gate Drive (3 V Compatible) VGS(th) = 0.9 V Max
` Low Drain-Source Leakage Current <100 nA From 25°C to 75°C at VDS = 6 V
` Fast Switching . . . 5.8 ns Typ td(on)
` Small-Outline Surface-Mount Power Package
Pinout
Specifications
| |
UNIT |
| Drain-to-source voltage, VDS |
-7 |
V |
| Gate-to-source voltage, VGS |
±7 |
V |
| Continuous drain current ID |
VGS= -27V |
TP = 25‡ |
-5 |
A |
|
TP = 125‡ |
-2.3 |
|
VGS= -4.5V |
TP = 25‡ |
-6 |
|
TP = 125‡ |
-2.7 |
| Pulse drain current, ID |
TA = 25 |
-24 |
A |
| Continuous source current (diode conduction), IS |
TA = 25 |
-6 |
A |
| Continuous total power dissipation |
TA = 25‡ |
-4 |
W |
| Junction-to-pin thermal resistance (qJP) |
31 |
/W |
| Continuous total power dissipation |
TA = 25 |
1.25 |
W |
| Junction-to-ambient thermal resistance (qJA) |
100 |
/W |
| Storage temperature range, Tstg |
-65 to 150 |
|
| Operating junction temperature range, TJ |
-40 to 150 |
|
| Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds |
260 |
|
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated onditions for extended periods may affect device reliability.
‡ TP Temperature of drain pins measured close to the package
DescriptionThe TPS1110 is a single, low-rDS(on), P-channel enhancement-mode power MOS transistor. The device features extremely low-rDS(on) values coupled with logic-level gate-drive capability and very low drain-source eakage current. With a maximum VGS(th) of 0.9 V and an IDSS of only 100 nA, the TPS1110 is the ideal high-side switch for low-voltage, portable battery-management power-distribution systems where maximizing battery life is an important concern. The thermal performance of the 8-pin small-outline (D) package has been greatly enhanced over the standard 8-pin SOIC, further making the TPS1110 ideally suited for many power pplications. For compatibility with existing designs, the TPS1110 has a pinout common with other P-channel MOSFETs in small-outline integrated circuit (SOIC) packages. It is characterized for an operating junction temperature range, TJ, from 40°C to 150°C. The D package is available packaged in standard sleeves or in taped and reeled formats. When ordering the tape-and-reel format, add an R suffix to the device type number (e.g., TPS1110DR).
TPS1110 Data Sheet
