TMS470R1B768

Features: ` High-Performance Static CMOS Technology Five Serial Peripheral Interfaces (SPIs)` TMS470R1x 16/32-Bit RISC Core ` 255 Programmable Baud Rates (ARM7TDM™) Two Serial Communications Interfaces 60-MHz (Pipeline Mode) (SCIs) Independent 16/32-Bit Instruction Set ` 224 Selectable ...

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SeekIC No. : 004525148 Detail

TMS470R1B768: Features: ` High-Performance Static CMOS Technology Five Serial Peripheral Interfaces (SPIs)` TMS470R1x 16/32-Bit RISC Core ` 255 Programmable Baud Rates (ARM7TDM™) Two Serial Communication...

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Part Number:
TMS470R1B768
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/1/11

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Product Details

Description



Features:

` High-Performance Static CMOS Technology
      Five Serial Peripheral Interfaces (SPIs)
` TMS470R1x 16/32-Bit RISC Core
` 255 Programmable Baud Rates (ARM7TDM™)
    Two Serial Communications Interfaces
    60-MHz (Pipeline Mode) (SCIs)
    Independent 16/32-Bit Instruction Set
` 224 Selectable Baud Rates
    Open Architecture With Third-Party Support
` Asynchronous/Isosynchronous Modes
    Built-In Debug Module
     Three High-End CAN Controllers (HECCs)
    Utilizes Big-Endian Format
` 32-Mailbox Capacity Each
` Integrated Memory
` Fully Compliant With CAN Protocol,
    768K-Byte Program Flash Version 2.0B
` 3 Banks With 18 Contiguous Sectors
` High-End Timer (HET)
` Internal State Machine for Programming
    32 Programmable I/O Channels: and Erase
` 24 High-Resolution Pins
    48K-Byte Static RAM (SRAM)
` 8 Standard-Resolution Pins
` 15 Dedicated GIO Pins,1 Input-Only GIO Pin,
    High-Resolution Share Feature (XOR) and 71 Additional Peripheral I/Os
    High-End Timer RAM
` Operating Features
` 128-Instruction Capacity
    Core Supply Voltage (VCC ): 1.812.05 V
` 16-Channel 10-Bit Multi-Buffered ADC
    I/O Supply Voltage (VCCIO): 3.03.6 V (MibADC)
    Low-Power Modes: STANDBY and HALT
    256-Word FIFO Buffer
    Extended Industrial Temperature Range
    Single- or Continuous-Conversion Modes
` 470+ System Module
    1.55 s Minimum Sample and Conversion
    32-Bit Address Space Decoding Time
    Bus Supervision for Memory and
    Calibration Mode and Self-Test Features Peripherals
` Eight External Interrupts
    Analog Watchdog (AWD) Timer
` Flexible Interrupt Handling
    Real-Time Interrupt (RTI)
` External Clock Prescale (ECP) Module
    System Integrity and Failure Detection
    Programmable Low-Frequency External
    Interrupt Expansion Module (IEM) Clock (CLK)
` Direct Memory Access (DMA) Controller
` On-Chip Scan-Base Emulation Logic, IEEE
    32 Control Packets and 16 Channels Standard 1149.1(1) (JTAG) Test-Access Port
` Zero-Pin Phase-Locked Loop (ZPLL)-Based
` 144-Pin Plastic Low-Profile Quad Flatpack Clock Module With Prescaler (PGE Suffix)
    Multiply-by-4 or -8 Internal ZPLL Option (1) The test-access port is compatible with the IEEE Standard 1149.1-1990, IEEE Standard Test-Access Port and Boundary
    ZPLL Bypass Mode Scan Architecture specific



Pinout

  Connection Diagram


Specifications

over operating free-air temperature range, T version unless otherwise noted(1)
Supply voltage range: VCC(2) .......................................................-0.3 V to 2.5 V
Supply voltage range: VCCIO , VCCAD , VCCP (flash pump)(2)........-0.3 V to 4.1V
Input voltage range: All input pins ..................................................-0.3 V to 4.1V
Input clamp current: IIK (VI < 0 or VI > VCCIO )
All pins except ADIN[0:15], PORRST, TRST , TEST, and TCK ......................±20 mA
IIK (VI < 0 or VI > VCCAD )
ADIN[0:15] ...............................................................................................±10 mA.
Operating free-air tempera- T version ...........................................-40  to 105
ture ranges, TA :
Operating junction temperature range, TJ: ....................................-40  to 150
Storage temperature range, Tstg:................................................. -65  to 150

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to their associated grounds.



Description

The TMS470R1B768(1) device is a member of the Texas Instruments (TI) TMS470R1x family of general- purpose16/32-bit reduced instruction set computer (RISC) microcontrollers. The B768 microcontroller offers high performance utilizing the high-speed ARM7TDMI 16/32-bit RISC central processing unit (CPU), resulting in a high instruction throughput while maintaining greater code efficiency. The ARM7TDMI 16/32-bit RISC CPU views memory as a linear collection of bytes numbered upwards from zero. The TMS470R1B768 utilizes the big-endian format where the most significant byte of a word is stored at the lowest numbered byte and the least  significant byte at the highest numbered byte.

High-end embedded control applications demand more performance from their controllers while maintaining low
costs. The B768 RISC core architecture offers solutions to these performance and cost demands while maintaining low power consumption.

The B768 device contains the following:
· ARM7TDMI 16/32-Bit RISC CPU
· TMS470R1x system module (SYS) with 470+ enhancements [including an interrupt expansion module (IEM)
and a 16-channel direct-memory access (DMA) controller]
· 768K-byte flash
· 48K-byte SRAM
· Zero-pin phase-locked loop (ZPLL) clock module
· Analog watchdog (AWD) timer
· Real-time interrupt (RTI) module
· Five serial peripheral interface (SPI) modules
· Two serial communications interface (SCI) modules
· Three high-end CAN controller (HECC) modules
· 10-bit multi-buffered analog-to-digital converter (MibADC) with 16 input channels
· High-end timer (HET) controlling 32 I/Os
· External clock prescale (ECP) module
· Up to 86 I/O pins and 1 input-only pin
The functions performed by the 470+ system module (SYS) include:
· Address decoding
· Memory protection
· Memory and peripherals bus supervision
· Reset and abort exception management
· Expanded interrupt capability with prioritization for all internal interrupt sources
· Device clock control
· Direct-memory access (DMA) and control
· Parallel signature analysis (PSA)

This data sheet includes device-specific information such as memory and peripheral select assignment, interrupt priority, and a device memory map. For a more detailed functional description of the SYS module, see the TMS470R1x System Module Reference Guide (literature number SPNU189). For a more detailed functional description of the IEM module, see the TMS470R1x Interrupt Expansion Module (IEM) Reference Guide (literature number SPNU211). And for a more detailed functional description of the DMA module, see the TMS470R1x Direct-Memory Access (DMA) Controller Reference Guide (literature number SPNU210). The B768 memory includes general-purpose SRAM supporting single-cycle read/write accesses in byte, half-word, and word modes.

The flash memory on this device is a nonvolatile, electrically erasable and programmable memory implemented with a 32-bit-wide data bus interface.The flash operates with a system clock frequency of up to 24 MHz. When in ipeline mode, the flash operates with a system clock frequency of up to 60 MHz. For more detailed information on the F05 devices flash, see the F05 flash section of this data sheet.




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