Features: ` Single-Chip Parallel Multiple Instruction/Multiple Data (MIMD) DSP` More Than Two Billion RISC-Equivalent Operations per Second` Master Processor (MP) 32-Bit Reduced Instruction Set Computing (RISC) Processor IEEE-754 Floating-Point Capability 4K-Byte Instruction Cache 4K-Byte Data Cac...
TMS320C80: Features: ` Single-Chip Parallel Multiple Instruction/Multiple Data (MIMD) DSP` More Than Two Billion RISC-Equivalent Operations per Second` Master Processor (MP) 32-Bit Reduced Instruction Set Comp...
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Supply voltage range, VDD (see Note 1) . . . . . . . . . . 0.3 V to 4 V
Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 4 V
Output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 4 V
Operating case temperature range, TC . . . . . . . . . . . .0°C to 85°C
Storage temperature range, Tstg . . . . . . . . . . . . 55°C to 150°C
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to VSS.
The TMS320C80 is a single chip, MIMD parallel processor capable of performing over two billion operations per second.TMS320C80 consists of a 32-bit RISC master processor with a 120-MFLOP IEEE floating-point unit, four 32-bit parallel processing digital signal processors (DSPs), a transfer controller with up to 480M-byte/s off-chip transfer rate, and a video controller. All the processors are coupled tightly through an on-chip crossbar that provides shared access to on-chip RAM. This performance and programmability make the 'C80 ideally suited for video, imaging, and high-speed telecommunications applications.