TMS320C6722

Features: . C672x: 32-/64-Bit 300-MHz Floating-Point DSPs. Upgrades to C67x+ CPU From C67x Family: 2X CPU Registers [64 General-Purpose] New Audio-Specific Instructions Compatible With the C67x CPU. Enhanced Memory System 256K-Byte Unified Program/Data RAM 384K-Byte Unified Program/Data ROM Single...

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SeekIC No. : 004524947 Detail

TMS320C6722: Features: . C672x: 32-/64-Bit 300-MHz Floating-Point DSPs. Upgrades to C67x+ CPU From C67x Family: 2X CPU Registers [64 General-Purpose] New Audio-Specific Instructions Compatible With the C67x CPU....

floor Price/Ceiling Price

Part Number:
TMS320C6722
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/1/11

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Product Details

Description



Features:

.   C672x: 32-/64-Bit 300-MHz Floating-Point DSPs
.   Upgrades to C67x+ CPU From C67x Family:
2X CPU Registers [64 General-Purpose]
New Audio-Specific Instructions
Compatible With the C67x CPU
.   Enhanced Memory System
256K-Byte Unified Program/Data RAM
384K-Byte Unified Program/Data ROM
Single-Cycle Data Access From CPU
Large Program Cache (32K Byte) Supports RAM, ROM, and External Memory
.   External Memory Interface (EMIF) Supports
100-MHz SDRAM (16- or 32-Bit)
Asynchronous NOR Flash, SRAM (8-,16-, or32-Bit)
NAND Flash (8- or 16-Bit)
.   Enhanced I/O System
High-Performance Crossbar Switch
Dedicated McASP DMA Bus
Deterministic I/O Performance
.   dMAX (Dual Data Movement Accelerator)
    Supports:
16 Independent Channels
Concurrent Processing of Two Transfer Requests
1-, 2-, and 3-Dimensional
    Memory-to-Memory and
    Memory-to-Peripheral Data Transfers
Circular Addressing Where the Size of an Circular Buffer (FIFO) is not Limited to 2
Table-Based Multi-Tap Delay Read and Write Transfers From/To a Circular Buffer
.   Three Multichannel Audio Serial Ports
Transmit/Receive Clocks up to 50 MHz
Six Clock Zones and 16 Serial Data Pins
Supports TDM, I2S, and Similar Formats
DIT-Capable (McASP2)
.   Universal Host-Port Interface (UHPI)
32-Bit-Wide Data Bus for High Bandwidth
Muxed and Non-Muxed Address and Data
.   Two 10-MHz SPI Ports With 3-, 4-, and 5-PinOptions
.   Two Inter-Integrated Circuit (I2C) Ports
.   Real-Time Interrupt Counter/Watchdog
.   Oscillator- and Software-Controlled PLL
.   Applications:
Professional Audio
.   Mixers
.   Effects Boxes
.   Audio Synthesis
.   Instrument/Amp Modeling
.   Audio Conferencing
.   Audio Broadcast
.   Audio Encoder
Emerging Audio Applications
Biometrics
Medical
Industrial
.   Commercial or Extended Temperature
.   144-Pin, 0.5-mm, PowerPAD(TM) Thin Quad Flatpack (TQFP) [RFP Suffix]
.    256-Terminal, 1.0-mm, 16x16 Array Plastic Ball
     Grid Array (PBGA) [GDH and ZDH Suffixes]



Application

Amplifiers                              amplifier.ti.com                      Audio
Data Converters                   dataconverter.ti.com             Automotive
DSP                                       dsp.ti.com                             Broadband
Interface                               interface.ti.com                     Digital Control
Logic                                     logic.ti.com                            Military
Power Mgmt                          power.ti.com                        Optical Networking
Microcontrollers                    microcontroller.ti.com            Security
                                                                                          Telephony
                                                                                          Video & Imaging
                                                                                          Wireless



Pinout

  Connection Diagram


Specifications

 

UNIT


Supply voltage range, CVDD , OSCVDD(3)

0.3 to 1.8

V

Supply voltage range, DVDD , PLLHV

0.3 to 4

V

Input Voltage Range

All pins except OSCIN

0.3 to DVDD + 0.5

V

OSCIN pin

0.3 to DVDD + 0.5

Output Voltage Range

All pins except OSCOUT

0.3 to DVDD + 0.5

V

OSCOUT pin

0.3 to DVDD + 0.5

Clamp Current

±20

mA

Operating case temperature range TC

Default

0 to 90

°C

A version

40 to 105

Storage temperature range, Tstg

65 to 150

°C




Description

The TMS320C672x is the next generation of Texas Instruments' C67x(TM) family of high-performance 32-/64-bit floating-point digital signal processors. The TMS320C672x includes the TMS320C6727,(1) TMS320C6726, and TMS320C6722 devices.

Efficient Memory System. The memory controller TMS320C6722  maps the large on-chip 256K-byte RAM and 384K-byte ROM as unified program/data memory. Development is simplified since there is no fixed division between program and data memory size as on some other devices.

The memory controller TMS320C6722  supports single-cycle data accesses from the C67x+ CPU to the RAM and ROM. Up to three parallel accesses to the internal RAM and ROM from three of the following four sources aresupported:
* Two 64-bit data accesses from the C67x+ CPU
* One 256-bit program fetch from the core and program cache
* One 32-bit data access from the peripheral system (either dMAX or UHPI)

Multiple transfers occur in parallel through the crossbar as long as there is no conflict between bus masters for a particular target. When a conflict does occur, the arbitration is a simple and deterministic fixed-priority scheme.
The TMS320C6722  and C6722 support SDRAM devices up to 128M bits.

The TMS320C6722  extends SDRAM support to 256M-bit and 512M-bit devices.

Asynchronous memory support is typically used to boot from a parallel non-multiplexed NOR flash device that can be 8, 16, or 32 bits wide. Booting from larger flash devices than are natively supported by the dedicated EMIF address lines is accomplished by using general-purpose I/O pins for upper address lines.

The asynchronous memory interface can also be configured to support 8- or 16-bit-wide NAND flash. It includes a hardware ECC calculation (for single-bit errors) that can operate on blocks of data up to 512 bytes.

Universal Host-Port Interface (UHPI) for High-Speed Parallel I/O. The Universal Host-Port Interface (UHPI) is a parallel interface through which an external host CPU can access memories on the DSP. Three modes are supported by the C672x UHPI:
* Multiplexed Address/Data - Half-Word (16-bit-wide) Mode (similar to C6713)
* Multiplexed Address/Data - Full Word (32-bit-wide) Mode
* Non-Multiplexed Mode - 16-bit Address and 32-bit Data Bus




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