Features: ` Highest Performance Fixed-Point Digital Signal Processors (DSPs) TMS320C62x 5-, 4-, 3.33-ns Instruction Cycle Time 200-, 250-, 300-MHz Clock Rate Eight 32-Bit Instructions/Cycle 1600, 2000, 2400 MIPS
` VelociTITM Advanced Very Long Instruction Word (VLIW) 'C62x CPU Core Eight Highly Independent Functional
Units: Six ALUs (32-/40-Bit) Two 16-Bit Multipliers (32-Bit Result) Load-Store Architecture With 32 32-BitGeneral-Purpose Registers Instruction Packing Reduces Code Size All Instructions Conditional
` Instruction Set Features Byte-Addressable (8-, 16-, 32-Bit Data) 8-Bit Overflow Protection Saturation Bit-Field Extract, Set, Clear Bit-Counting Normalization
` On-Chip SRAM 1M-Bit ('C6204) 3M-Bit ('C6202/'C6202B) 7M-Bit ('C6203)
` 32-Bit External Memory Interface (EMIF) Glueless Interface to Synchronous Memories: SDRAM or SBSRAM
Glueless Interface to Asynchronous Memories: SRAM and EPROM 52M-Byte Addressable External Memory Space
` Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel
` Flexible Phase-Locked-Loop (PLL) Clock Generator
` 32-Bit Expansion Bus Glueless/Low-Glue Interface to Popular PCI Bridge Chips Glueless/Low-Glue Interface to Popular Synchronous or Asynchronous Micropr ocessor Buses Master/Slave Functionality Glueless Interface to Synchronous FIFOs and Asynchronous Peripherals
` Multichannel Buffered Serial Ports (McBSPs) Direct Interface to T1/E1, MVIP, SCSA Framers ST-Bus-Switching Compatible Up to 256 Channels Each AC97-CompatibleSerial-Peripheral Interface (SPI)Compatible (MotorolaE)
` Two 32-Bit General-Purpose Timers
` IEEE-1149.1 (JTAG†) Boundary-Scan-Compatible
` 352-Pin BGA Package (GJL) ('02/02B/03)
` 384-Pin BGA Package (GLS) ('02/02B/03)
` 340-Pin BGA Package (GLW) ('C6204 only)Pin-Compatible With the GLS Package Except Inner Row of Balls (Additional Power and Ground Pins) are Removed‡
` 0.18-mm/5-Level Metal Process ('6202 only) 0.15-mm/5-Level Metal Process ('02B/03/04) CMOS Technology
` 3.3-V I/Os, 1.8-V Internal ('C6202 only) 3.3-V I/Os, 1.5-V Internal ('C6202B/03/04)Pinout
SpecificationsSupply voltage range, CVDD (see Note 1) . . . . . . . . . . . . . . . 0.3 V to 2.3 V
Supply voltage range, DVDD (see Note 1) . . . . . .. . . . . . . . . . . . 0.3 V to 4 V
Input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 4 V
Output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 4 V
Operating case temperature range, TC: (default) . . . . . . . . . . . . . 0 to 90
(A version) . . . . . . . . . . . . . . . . . . . . . . . 40 to105
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . 55 to 150
Temperature cycle range, (1000-cycle performance) . . . . . . . . 40 to 125
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to VSS.DescriptionThe TMS320C6202, TMS320C6202B, TMS320C6203, and TMS320C6204 devices are part of the TMS320C62x fixed-point DSP family in the TMS320C6000 platform. The 'C62x devices are based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.
The TMS320C62x DSP offers cost-effective solutions to high-performance DSP programming challenges. The TMS320C6202B/'03 has a performance of up to 2400 million instructions per second (MIPS) at 300 MHz, while the TMS320C6202 has a performance of up to 2000 MIPS at 250 MHz, and the TMS320C6204 has a performance of up to 1600 MIPS at 200 MHz. The 'C6202/'02B/'03/'04 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. These processors have 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide six arithmetic logic units (ALUs) for a high degree of parallelism and two 16-bit multipliers for a 32-bit result. The 'C6202/'02B/' 3/'04 can produce two multiply-accumulates (MACs) per cycle. This gives a total of 600 million MACs per second (MMACS) for the 'C6202B/'03 device, a total of 500 MMACS for the 'C6202 device, and a total of 400 MMACS for the 'C6204 device. The 'C6202/'02B/'03/'04 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals.
The TMS320C62x DSPs include an on-chip memory, with the 'C6203 device offering the most memory at 7 Mbits. For the 'C6202/'02B device, program memory consists of two blocks, with a 128K-byte block configured as memory-mapped program space, and the other 128K-byte block user-configurable as cache or memory-mapped program space. Data memory consists of two 64K-byte blocks of RAM. Similarly, the 'C6203 device program memory consists of two blocks, with a 256K-byte block configured as memory-mapped program space, and the other 128K-byte block user-configurable as cache or memory-mapped program space. Data memory consists of two 256K-byte blocks of RAM. For the 'C6204 device, program memory consists of a single 64K-byte block that is user-configured as cache or memory-mapped program space. Data memory consists of two 32K-byte blocks of RAM.
The 'C6202/'02B/'03/'04 device has a powerful and diverse set of peripherals. The peripheral set includes multichannel buffered serial ports (McBSPs), general-purpose timers, a 32-bit expansion bus (XB) that offers ease of interface to synchronous or asynchronous industry-standard host bus protocols, and a glueless 32-bit external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.
The 'C62x devices have a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a WindowsE debugger interface for visibility into source code execution.
TMS320C6204 Data Sheet
